Re: [Qemu-devel] [PATCH] target-ppc: Use movcond in isel

[Alexander Graf <agraf@suse.de>]

On 20.02.15 07:20, Richard Henderson wrote:
> Signed-off-by: Richard Henderson <rth@twiddle.net>
> ---
>  target-ppc/translate.c | 29 +++++++++++------------------
>  1 file changed, 11 insertions(+), 18 deletions(-)
> ---
> Note that this is relative to an outstanding TCG patch set.
> The full tree is at
> 
>   git://github.com/rth7680/qemu.git ppc-movcond
> 
> 
> r~
> ---
> 
> diff --git a/target-ppc/translate.c b/target-ppc/translate.c
> index 98165e9..278c266 100644
> --- a/target-ppc/translate.c
> +++ b/target-ppc/translate.c
> @@ -753,27 +753,20 @@ static void gen_cmpli(DisasContext *ctx)
>  /* isel (PowerPC 2.03 specification) */
>  static void gen_isel(DisasContext *ctx)
>  {
> -    TCGLabel *l1, *l2;
>      uint32_t bi = rC(ctx->opcode);
> -    uint32_t mask;
> -    TCGv_i32 t0;
> +    uint32_t mask = 0x08 >> (bi & 0x03);
> +    TCGv t0 = tcg_temp_new();
> +    TCGv zr;
>  
> -    l1 = gen_new_label();
> -    l2 = gen_new_label();
> +    tcg_gen_extu_i32_tl(t0, cpu_crf[bi >> 2]);
> +    tcg_gen_andi_tl(t0, t0, mask);
>  
> -    mask = 0x08 >> (bi & 0x03);
> -    t0 = tcg_temp_new_i32();
> -    tcg_gen_andi_i32(t0, cpu_crf[bi >> 2], mask);
> -    tcg_gen_brcondi_i32(TCG_COND_EQ, t0, 0, l1);
> -    if (rA(ctx->opcode) == 0)
> -        tcg_gen_movi_tl(cpu_gpr[rD(ctx->opcode)], 0);
> -    else
> -        tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)]);
> -    tcg_gen_br(l2);
> -    gen_set_label(l1);
> -    tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rB(ctx->opcode)]);
> -    gen_set_label(l2);
> -    tcg_temp_free_i32(t0);
> +    zr = tcg_const_tl(0);

Just move this into the declaration?

Otherwise I guess I'll just trust you on correctness :). But since it
depends on another patch set, can you just resend with the change above
once it's accepted upstream?


Alex

> +    tcg_gen_movcond_tl(TCG_COND_NE, cpu_gpr[rD(ctx->opcode)], t0, zr,
> +                       rA(ctx->opcode) ? cpu_gpr[rA(ctx->opcode)] : zr,
> +                       cpu_gpr[rB(ctx->opcode)]);
> +    tcg_temp_free(zr);
> +    tcg_temp_free(t0);
>  }
>  
>  /* cmpb: PowerPC 2.05 specification */
>