From: Richard Henderson <rth@twiddle.net>
To: Paolo Bonzini <pbonzini@redhat.com>, qemu-devel@nongnu.org
Cc: agraf@suse.de
Subject: Re: [Qemu-devel] [PATCH 1/3] tcg: add TCG_TARGET_TLB_DISPLACEMENT_BITS
Date: Fri, 20 Feb 2015 11:36:48 -0800 [thread overview]
Message-ID: <54E78CD0.5090702@twiddle.net> (raw)
In-Reply-To: <1424455040-3335-2-git-send-email-pbonzini@redhat.com>
On 02/20/2015 09:57 AM, Paolo Bonzini wrote:
> diff --git a/tcg/i386/tcg-target.h b/tcg/i386/tcg-target.h
> index 7a9980e..8ba977a 100644
> --- a/tcg/i386/tcg-target.h
> +++ b/tcg/i386/tcg-target.h
> @@ -25,6 +25,7 @@
> #define TCG_TARGET_I386 1
>
> #define TCG_TARGET_INSN_UNIT_SIZE 1
> +#define TCG_TARGET_TLB_DISPLACEMENT_BITS 32
31.
Positive displacements only in 64-bit mode. I don't think it's worth
conditionalizing this for 32-bit, since we can't actually allocate 2G of TLBs
and then actually accomplish anything. ;-)
> diff --git a/tcg/mips/tcg-target.h b/tcg/mips/tcg-target.h
> index c88a1c9..f5ba52c 100644
> --- a/tcg/mips/tcg-target.h
> +++ b/tcg/mips/tcg-target.h
> @@ -27,6 +27,7 @@
> #define TCG_TARGET_MIPS 1
>
> #define TCG_TARGET_INSN_UNIT_SIZE 4
> +#define TCG_TARGET_TLB_DISPLACEMENT_BITS 16
> #define TCG_TARGET_NB_REGS 32
>
> typedef enum {
> diff --git a/tcg/ppc/tcg-target.h b/tcg/ppc/tcg-target.h
> index 32ac442..7ce7048 100644
> --- a/tcg/ppc/tcg-target.h
> +++ b/tcg/ppc/tcg-target.h
> @@ -32,6 +32,7 @@
>
> #define TCG_TARGET_NB_REGS 32
> #define TCG_TARGET_INSN_UNIT_SIZE 4
> +#define TCG_TARGET_TLB_DISPLACEMENT_BITS 16
Close enough, since the BUILD_BUG_ON should still catch this out if somehow the
size is within that last 16 bytes of 64k.
r~
next prev parent reply other threads:[~2015-02-20 19:36 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-02-20 17:57 [Qemu-devel] [PATCH v2 for-2.3 0/3] Support more than 8 MMU modes, speedup PPC by 10% Paolo Bonzini
2015-02-20 17:57 ` [Qemu-devel] [PATCH 1/3] tcg: add TCG_TARGET_TLB_DISPLACEMENT_BITS Paolo Bonzini
2015-02-20 19:36 ` Richard Henderson [this message]
2015-02-23 15:21 ` Alexander Graf
2015-02-23 16:03 ` Richard Henderson
2015-02-20 17:57 ` [Qemu-devel] [PATCH 2/3] softmmu: support up to 12 MMU modes Paolo Bonzini
2015-02-20 19:51 ` Richard Henderson
2015-02-20 17:57 ` [Qemu-devel] [PATCH 3/3] target-ppc: use separate indices for various translation modes Paolo Bonzini
2015-02-20 19:54 ` Richard Henderson
-- strict thread matches above, loose matches on Subject: below --
2015-02-20 12:45 [Qemu-devel] [PATCH for-2.3 0/3] Support more than 8 MMU modes, speedup by 10% Paolo Bonzini
2015-02-20 12:45 ` [Qemu-devel] [PATCH 1/3] tcg: add TCG_TARGET_TLB_DISPLACEMENT_BITS Paolo Bonzini
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=54E78CD0.5090702@twiddle.net \
--to=rth@twiddle.net \
--cc=agraf@suse.de \
--cc=pbonzini@redhat.com \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.