From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49377) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YPKuv-0005jh-VD for qemu-devel@nongnu.org; Sat, 21 Feb 2015 20:01:07 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YPKus-00040o-Nu for qemu-devel@nongnu.org; Sat, 21 Feb 2015 20:01:05 -0500 Received: from mail113-251.mail.alibaba.com ([205.204.113.251]:35450 helo=us-alimail-mta1.hst.scl.en.alidc.net) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YPKus-0003xg-BF for qemu-devel@nongnu.org; Sat, 21 Feb 2015 20:01:02 -0500 Message-ID: <54E92C1C.9060208@sunrus.com.cn> Date: Sun, 22 Feb 2015 09:08:44 +0800 From: Chen Gang S MIME-Version: 1.0 References: <54E7F5EB.60402@sunrus.com.cn> <54E830DD.4070708@sunrus.com.cn> <54E8A4C9.3000101@sunrus.com.cn> <54E8B352.9040309@twiddle.net> <54E921E2.4070503@sunrus.com.cn> <54E921FF.6000208@ezchip.com> In-Reply-To: <54E921FF.6000208@ezchip.com> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH] target-tilegx: Finish decoding the first TB block. List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Chris Metcalf , Richard Henderson , Peter Maydell , Riku Voipio , "walt@tilera.com" Cc: qemu-devel On 2/22/15 08:25, Chris Metcalf wrote: > On 2/21/2015 7:25 PM, Chen Gang S wrote: >> On 2/22/15 00:33, Richard Henderson wrote: >>> >On 02/21/2015 07:31 AM, Chen Gang S wrote: >>>> >> >>>> >> - We can still use the original pipes order: "y0, y2, y1" and "x0, x1". >>> > >>> >I guess, sure, though I don't think that'll help as much as you imagine. >>> > >>> >> OK, thanks. For me, your idea is OK, it is more simpler (although with >> more tcg temporary variables). > > Richard pretty much said all I wanted to say, but I just wanted to reinforce > that the semantics of the multiple pipes is always "all together". OK, thanks. > So if you have > { move r1, r2; move r2, r1 } then that swaps r1 and r2. So the first pipe must have temporary variable. > Or if you have > { ld r1, sp; jrp r1 } then you are restoring r1 but jumping to wherever its > previous value said you needed to go. Etc. Excuse me, I am not quite sure whether ld/st can be in pipe x0, y0, or y1. But I guess your meaning is that y2 must have temporary variable, or it will cause issue. > Similarly, if any pipeline takes an exception (a TLB fault from a memory op, > a GPV fault from an illegal mfspr, etc) then no pipeline completes its action. > Oh, really !! And I guess, Richard's code can not be sure of it: memory write operand (e.g st) is not buffered. If what I guess is correct, for me, it is not quite easy to fix this issue. I also guess, at present, we need think of more before continue. Thanks. -- Chen Gang Open, share, and attitude like air, water, and life which God blessed