Re: [PATCH RFT] x86: move cacheinfo sysfs to generic cacheinfo infrastructure

[Sudeep Holla <sudeep.holla@arm.com>]

Hi Boris,

On 23/01/15 18:15, Borislav Petkov wrote:
> On Fri, Jan 23, 2015 at 02:55:03PM +0100, Thomas Gleixner wrote:
>> Cc: Boris
>>
>> On Thu, 8 Jan 2015, Sudeep Holla wrote:
>>
>>> This patch removes the redundant sysfs cacheinfo code by reusing
>>> the newly introduced generic cacheinfo infrastructure through the
>>> commit 246246cbde5e ("drivers: base: support cpu cache information
>>> interface to userspace via sysfs")
>>>
>>> The private pointer provided by the cacheinfo is used to implement
>>> the AMD L3 cache specific attributes.
>>>
>>> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
>>> Cc: Thomas Gleixner <tglx@linutronix.de>
>>> Cc: Ingo Molnar <mingo@redhat.com>
>>> Cc: "H. Peter Anvin" <hpa@zytor.com>
>>> Cc: x86@kernel.org
>
> ...
> [    2.878173] ACPI: processor limited to max C-state 1
> [    2.884048] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
> [    2.911085] 00:01: ttyS0 at I/O 0x3f8 (irq = 4, base_baud = 115200) is a 16550A
> [    2.920699] Linux agpgart interface v0.103
> [    2.924908] [drm] Initialized drm 1.1.0 20060810
> [    2.929719] ------------[ cut here ]------------
> [    2.934419] WARNING: CPU: 0 PID: 1 at kernel/locking/lockdep.c:2744 lockdep_trace_alloc+0xd4/0xe0()
> [    2.943591] DEBUG_LOCKS_WARN_ON(irqs_disabled_flags(flags))

Sorry for late response, was on vacation.
I have fixed this issue now and will post the new version soon.
Thanks a lot for trying it out.

Regards,
Sudeep