diff for duplicates of <54EF478D.8040600@free-electrons.com> diff --git a/a/1.txt b/N1/1.txt index 2824e2f..6862daf 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -123,7 +123,7 @@ in the machine_desc structure. > +/ { > + soc { > + internal-regs { -> + pinctrl@18000 { +> + pinctrl at 18000 { > + compatible = "marvell,mv88f6920-pinctrl"; > + reg = <0x18000 0x20>; > + }; @@ -203,50 +203,50 @@ in the machine_desc structure. > + MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>; > + > + internal-regs { -> + spi@10680 { +> + spi at 10680 { > + status = "okay"; > + pinctrl-0 = <&spi1_pins>; > + pinctrl-names = "default"; > + -> + spi-flash@0 { +> + spi-flash at 0 { > + #address-cells = <1>; > + #size-cells = <0>; > + compatible = "n25q128a13"; > + reg = <0>; > + spi-max-frequency = <108000000>; > + -> + partition@0 { +> + partition at 0 { > + label = "U-Boot"; > + reg = <0 0x400000>; > + }; > + -> + partition@400000 { +> + partition at 400000 { > + label = "Filesystem"; > + reg = <0x400000 0x1000000>; > + }; > + }; > + }; > + -> + i2c@11000 { +> + i2c at 11000 { > + pinctrl-0 = <&i2c0_pins>; > + pinctrl-names = "default"; > + status = "okay"; > + clock-frequency = <100000>; > + }; > + -> + serial@12000 { +> + serial at 12000 { > + pinctrl-0 = <&uart0_pins>; > + pinctrl-names = "default"; > + status = "okay"; > + }; > + -> + serial@12100 { +> + serial at 12100 { > + pinctrl-0 = <&uart1_pins>; > + pinctrl-names = "default"; > + status = "okay"; > + }; > + -> + flash@d0000 { +> + flash at d0000 { > + status = "okay"; > + pinctrl-0 = <&nand_pins>; > + pinctrl-names = "default"; @@ -257,15 +257,15 @@ in the machine_desc structure. > + nand-ecc-strength = <8>; > + nand-ecc-step-size = <512>; > + -> + partition@0 { +> + partition at 0 { > + label = "U-Boot"; > + reg = <0 0x800000>; > + }; -> + partition@800000 { +> + partition at 800000 { > + label = "Linux"; > + reg = <0x800000 0x800000>; > + }; -> + partition@1000000 { +> + partition at 1000000 { > + label = "Filesystem"; > + reg = <0x1000000 0x3f000000>; > + }; @@ -275,15 +275,15 @@ in the machine_desc structure. > + pcie-controller { > + status = "okay"; > + -> + pcie@1,0 { +> + pcie at 1,0 { > + status = "okay"; > + }; > + -> + pcie@2,0 { +> + pcie at 2,0 { > + status = "okay"; > + }; > + -> + pcie@3,0 { +> + pcie at 3,0 { > + status = "okay"; > + }; > + }; @@ -348,7 +348,7 @@ in the machine_desc structure. > + > + soc { > + internal-regs { -> + pinctrl@18000 { +> + pinctrl at 18000 { > + compatible = "marvell,mv88f6928-pinctrl"; > + reg = <0x18000 0x20>; > + }; @@ -422,12 +422,12 @@ in the machine_desc structure. > + #size-cells = <0>; > + enable-method = "marvell,armada-390-smp"; > + -> + cpu@0 { +> + cpu at 0 { > + device_type = "cpu"; > + compatible = "arm,cortex-a9"; > + reg = <0>; > + }; -> + cpu@1 { +> + cpu at 1 { > + device_type = "cpu"; > + compatible = "arm,cortex-a9"; > + reg = <1>; @@ -455,19 +455,19 @@ in the machine_desc structure. > + #size-cells = <1>; > + ranges = <0 MBUS_ID(0xf0, 0x01) 0 0x100000>; > + -> + scu@c000 { +> + scu at c000 { > + compatible = "arm,cortex-a9-scu"; > + reg = <0xc000 0x100>; > + }; > + -> + timer@c600 { +> + timer at c600 { > + compatible = "arm,cortex-a9-twd-timer"; > + reg = <0xc600 0x20>; > + interrupts = <GIC_PPI 13 (IRQ_TYPE_EDGE_RISING | GIC_CPU_MASK_SIMPLE(2))>; > + clocks = <&coreclk 2>; > + }; > + -> + gic: interrupt-controller@d000 { +> + gic: interrupt-controller at d000 { > + compatible = "arm,cortex-a9-gic"; > + #interrupt-cells = <3>; > + #size-cells = <0>; @@ -476,7 +476,7 @@ in the machine_desc structure. > + <0xc100 0x100>; > + }; > + -> + spi0: spi@10600 { +> + spi0: spi at 10600 { > + compatible = "marvell,orion-spi"; > + reg = <0x10600 0x50>; > + #address-cells = <1>; @@ -487,7 +487,7 @@ in the machine_desc structure. > + status = "disabled"; > + }; > + -> + spi1: spi@10680 { +> + spi1: spi at 10680 { > + compatible = "marvell,orion-spi"; > + reg = <0x10680 0x50>; > + #address-cells = <1>; @@ -498,7 +498,7 @@ in the machine_desc structure. > + status = "disabled"; > + }; > + -> + i2c0: i2c@11000 { +> + i2c0: i2c at 11000 { > + compatible = "marvell,mv64xxx-i2c"; > + reg = <0x11000 0x20>; > + #address-cells = <1>; @@ -509,7 +509,7 @@ in the machine_desc structure. > + status = "disabled"; > + }; > + -> + i2c1: i2c@11100 { +> + i2c1: i2c at 11100 { > + compatible = "marvell,mv64xxx-i2c"; > + reg = <0x11100 0x20>; > + #address-cells = <1>; @@ -520,7 +520,7 @@ in the machine_desc structure. > + status = "disabled"; > + }; > + -> + i2c2: i2c@11200 { +> + i2c2: i2c at 11200 { > + compatible = "marvell,mv64xxx-i2c"; > + reg = <0x11200 0x20>; > + #address-cells = <1>; @@ -531,7 +531,7 @@ in the machine_desc structure. > + status = "disabled"; > + }; > + -> + i2c3: i2c@11300 { +> + i2c3: i2c at 11300 { > + compatible = "marvell,mv64xxx-i2c"; > + reg = <0x11300 0x20>; > + #address-cells = <1>; @@ -542,7 +542,7 @@ in the machine_desc structure. > + status = "disabled"; > + }; > + -> + uart0: serial@12000 { +> + uart0: serial at 12000 { > + compatible = "snps,dw-apb-uart"; > + reg = <0x12000 0x100>; > + reg-shift = <2>; @@ -552,7 +552,7 @@ in the machine_desc structure. > + status = "disabled"; > + }; > + -> + uart1: serial@12100 { +> + uart1: serial at 12100 { > + compatible = "snps,dw-apb-uart"; > + reg = <0x12100 0x100>; > + reg-shift = <2>; @@ -562,7 +562,7 @@ in the machine_desc structure. > + status = "disabled"; > + }; > + -> + uart2: serial@12200 { +> + uart2: serial at 12200 { > + compatible = "snps,dw-apb-uart"; > + reg = <0x12200 0x100>; > + reg-shift = <2>; @@ -572,7 +572,7 @@ in the machine_desc structure. > + status = "disabled"; > + }; > + -> + uart3: serial@12300 { +> + uart3: serial at 12300 { > + compatible = "snps,dw-apb-uart"; > + reg = <0x12300 0x100>; > + reg-shift = <2>; @@ -582,7 +582,7 @@ in the machine_desc structure. > + status = "disabled"; > + }; > + -> + pinctrl@18000 { +> + pinctrl at 18000 { > + i2c0_pins: i2c0-pins { > + marvell,pins = "mpp2", "mpp3"; > + marvell,function = "i2c0"; @@ -612,34 +612,34 @@ in the machine_desc structure. > + }; > + }; > + -> + system-controller@18200 { +> + system-controller at 18200 { > + compatible = "marvell,armada-390-system-controller", > + "marvell,armada-370-xp-system-controller"; > + reg = <0x18200 0x100>; > + }; > + -> + gateclk: clock-gating-control@18220 { +> + gateclk: clock-gating-control at 18220 { > + compatible = "marvell,armada-390-gating-clock"; > + reg = <0x18220 0x4>; > + clocks = <&coreclk 0>; > + #clock-cells = <1>; > + }; > + -> + coreclk: mvebu-sar@18600 { +> + coreclk: mvebu-sar at 18600 { > + compatible = "marvell,armada-390-core-clock"; > + reg = <0x18600 0x04>; > + #clock-cells = <1>; > + }; > + -> + mbusc: mbus-controller@20000 { +> + mbusc: mbus-controller at 20000 { > + compatible = "marvell,mbus-controller"; > + reg = <0x20000 0x100>, <0x20180 0x20>, <0x20250 0x8>; > + }; > + -> + mpic: interrupt-controller@20000 { +> + mpic: interrupt-controller at 20000 { it should be - mpic: interrupt-controller@20a00 { + mpic: interrupt-controller at 20a00 { Thanks, @@ -656,7 +656,7 @@ Gregory > + interrupts = <GIC_PPI 15 IRQ_TYPE_LEVEL_HIGH>; > + }; > + -> + timer@20300 { +> + timer at 20300 { > + compatible = "marvell,armada-380-timer", > + "marvell,armada-xp-timer"; > + reg = <0x20300 0x30>, <0x21040 0x30>; @@ -670,18 +670,18 @@ Gregory > + clock-names = "nbclk", "fixed"; > + }; > + -> + cpurst@20800 { +> + cpurst at 20800 { > + compatible = "marvell,armada-370-cpu-reset"; > + reg = <0x20800 0x10>; > + }; > + -> + pmsu@22000 { +> + pmsu at 22000 { > + compatible = "marvell,armada-390-pmsu", > + "marvell,armada-380-pmsu"; > + reg = <0x22000 0x1000>; > + }; > + -> + xor@60800 { +> + xor at 60800 { > + compatible = "marvell,orion-xor"; > + reg = <0x60800 0x100 > + 0x60a00 0x100>; @@ -701,7 +701,7 @@ Gregory > + }; > + }; > + -> + xor@60900 { +> + xor at 60900 { > + compatible = "marvell,orion-xor"; > + reg = <0x60900 0x100 > + 0x60b00 0x100>; @@ -721,7 +721,7 @@ Gregory > + }; > + }; > + -> + flash@d0000 { +> + flash at d0000 { > + compatible = "marvell,armada370-nand"; > + reg = <0xd0000 0x54>; > + #address-cells = <1>; @@ -731,7 +731,7 @@ Gregory > + status = "disabled"; > + }; > + -> + sdhci@d8000 { +> + sdhci at d8000 { > + compatible = "marvell,armada-380-sdhci"; > + reg = <0xd8000 0x1000>, <0xdc000 0x100>; > + interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; @@ -740,7 +740,7 @@ Gregory > + status = "disabled"; > + }; > + -> + coredivclk: clock@e4250 { +> + coredivclk: clock at e4250 { > + compatible = "marvell,armada-390-corediv-clock", > + "marvell,armada-380-corediv-clock"; > + reg = <0xe4250 0xc>; @@ -778,9 +778,9 @@ Gregory > + /* > + * This port can be either x4 or x1. When > + * configured in x4 by the bootloader, then -> + * pcie@4,0 is not available. +> + * pcie at 4,0 is not available. > + */ -> + pcie@1,0 { +> + pcie at 1,0 { > + device_type = "pci"; > + assigned-addresses = <0x82000800 0 0x80000 0 0x2000>; > + reg = <0x0800 0 0 0 0>; @@ -798,7 +798,7 @@ Gregory > + }; > + > + /* x1 port */ -> + pcie@2,0 { +> + pcie at 2,0 { > + device_type = "pci"; > + assigned-addresses = <0x82000800 0 0x40000 0 0x2000>; > + reg = <0x1000 0 0 0 0>; @@ -816,7 +816,7 @@ Gregory > + }; > + > + /* x1 port */ -> + pcie@3,0 { +> + pcie at 3,0 { > + device_type = "pci"; > + assigned-addresses = <0x82000800 0 0x44000 0 0x2000>; > + reg = <0x1800 0 0 0 0>; @@ -834,10 +834,10 @@ Gregory > + }; > + > + /* -> + * x1 port only available when pcie@1,0 is +> + * x1 port only available when pcie at 1,0 is > + * configured as a x1 port > + */ -> + pcie@4,0 { +> + pcie at 4,0 { > + device_type = "pci"; > + assigned-addresses = <0x82000800 0 0x48000 0 0x2000>; > + reg = <0x2000 0 0 0 0>; diff --git a/a/content_digest b/N1/content_digest index d59d65f..a6e09cb 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,28 +1,9 @@ "ref\01424451874-25375-1-git-send-email-thomas.petazzoni@free-electrons.com\0" "ref\01424451874-25375-15-git-send-email-thomas.petazzoni@free-electrons.com\0" - "From\0Gregory CLEMENT <gregory.clement@free-electrons.com>\0" - "Subject\0Re: [PATCHv2 14/15] ARM: mvebu: add Device Tree files for Armada 39x SoC and board\0" + "From\0gregory.clement@free-electrons.com (Gregory CLEMENT)\0" + "Subject\0[PATCHv2 14/15] ARM: mvebu: add Device Tree files for Armada 39x SoC and board\0" "Date\0Thu, 26 Feb 2015 17:19:25 +0100\0" - "To\0Thomas Petazzoni <thomas.petazzoni@free-electrons.com>\0" - "Cc\0Jason Cooper <jason@lakedaemon.net>" - Andrew Lunn <andrew@lunn.ch> - Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> - devicetree@vger.kernel.org - Rob Herring <robh+dt@kernel.org> - Pawel Moll <pawel.moll@arm.com> - Mark Rutland <mark.rutland@arm.com> - Ian Campbell <ijc+devicetree@hellion.org.uk> - Kumar Gala <galak@codeaurora.org> - Mike Turquette <mturquette@linaro.org> - Stephen Boyd <sboyd@codeaurora.org> - Linus Walleij <linus.walleij@linaro.org> - linux-arm-kernel@lists.infradead.org - linux-gpio@vger.kernel.org - Tawfik Bayouk <tawfik@marvell.com> - Nadav Haklai <nadavh@marvell.com> - Lior Amsalem <alior@marvell.com> - Ezequiel Garcia <ezequiel.garcia@free-electrons.com> - " Maxime Ripard <maxime.ripard@free-electrons.com>\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "Hi Thomas,\n" @@ -150,7 +131,7 @@ "> +/ {\n" "> +\tsoc {\n" "> +\t\tinternal-regs {\n" - "> +\t\t\tpinctrl@18000 {\n" + "> +\t\t\tpinctrl at 18000 {\n" "> +\t\t\t\tcompatible = \"marvell,mv88f6920-pinctrl\";\n" "> +\t\t\t\treg = <0x18000 0x20>;\n" "> +\t\t\t};\n" @@ -230,50 +211,50 @@ "> +\t\t\t MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;\n" "> +\n" "> +\t\tinternal-regs {\n" - "> +\t\t\tspi@10680 {\n" + "> +\t\t\tspi at 10680 {\n" "> +\t\t\t\tstatus = \"okay\";\n" "> +\t\t\t\tpinctrl-0 = <&spi1_pins>;\n" "> +\t\t\t\tpinctrl-names = \"default\";\n" "> +\n" - "> +\t\t\t\tspi-flash@0 {\n" + "> +\t\t\t\tspi-flash at 0 {\n" "> +\t\t\t\t\t#address-cells = <1>;\n" "> +\t\t\t\t\t#size-cells = <0>;\n" "> +\t\t\t\t\tcompatible = \"n25q128a13\";\n" "> +\t\t\t\t\treg = <0>;\n" "> +\t\t\t\t\tspi-max-frequency = <108000000>;\n" "> +\n" - "> +\t\t\t\t\tpartition@0 {\n" + "> +\t\t\t\t\tpartition at 0 {\n" "> +\t\t\t\t\t\tlabel = \"U-Boot\";\n" "> +\t\t\t\t\t\treg = <0 0x400000>;\n" "> +\t\t\t\t\t};\n" "> +\n" - "> +\t\t\t\t\tpartition@400000 {\n" + "> +\t\t\t\t\tpartition at 400000 {\n" "> +\t\t\t\t\t\tlabel = \"Filesystem\";\n" "> +\t\t\t\t\t\treg = <0x400000 0x1000000>;\n" "> +\t\t\t\t\t};\n" "> +\t\t\t\t};\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\ti2c@11000 {\n" + "> +\t\t\ti2c at 11000 {\n" "> +\t\t\t\tpinctrl-0 = <&i2c0_pins>;\n" "> +\t\t\t\tpinctrl-names = \"default\";\n" "> +\t\t\t\tstatus = \"okay\";\n" "> +\t\t\t\tclock-frequency = <100000>;\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tserial@12000 {\n" + "> +\t\t\tserial at 12000 {\n" "> +\t\t\t\tpinctrl-0 = <&uart0_pins>;\n" "> +\t\t\t\tpinctrl-names = \"default\";\n" "> +\t\t\t\tstatus = \"okay\";\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tserial@12100 {\n" + "> +\t\t\tserial at 12100 {\n" "> +\t\t\t\tpinctrl-0 = <&uart1_pins>;\n" "> +\t\t\t\tpinctrl-names = \"default\";\n" "> +\t\t\t\tstatus = \"okay\";\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tflash@d0000 {\n" + "> +\t\t\tflash at d0000 {\n" "> +\t\t\t\tstatus = \"okay\";\n" "> +\t\t\t\tpinctrl-0 = <&nand_pins>;\n" "> +\t\t\t\tpinctrl-names = \"default\";\n" @@ -284,15 +265,15 @@ "> +\t\t\t\tnand-ecc-strength = <8>;\n" "> +\t\t\t\tnand-ecc-step-size = <512>;\n" "> +\n" - "> +\t\t\t\tpartition@0 {\n" + "> +\t\t\t\tpartition at 0 {\n" "> +\t\t\t\t\tlabel = \"U-Boot\";\n" "> +\t\t\t\t\treg = <0 0x800000>;\n" "> +\t\t\t\t};\n" - "> +\t\t\t\tpartition@800000 {\n" + "> +\t\t\t\tpartition at 800000 {\n" "> +\t\t\t\t\tlabel = \"Linux\";\n" "> +\t\t\t\t\treg = <0x800000 0x800000>;\n" "> +\t\t\t\t};\n" - "> +\t\t\t\tpartition@1000000 {\n" + "> +\t\t\t\tpartition at 1000000 {\n" "> +\t\t\t\t\tlabel = \"Filesystem\";\n" "> +\t\t\t\t\treg = <0x1000000 0x3f000000>;\n" "> +\t\t\t\t};\n" @@ -302,15 +283,15 @@ "> +\t\tpcie-controller {\n" "> +\t\t\tstatus = \"okay\";\n" "> +\n" - "> +\t\t\tpcie@1,0 {\n" + "> +\t\t\tpcie at 1,0 {\n" "> +\t\t\t\tstatus = \"okay\";\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tpcie@2,0 {\n" + "> +\t\t\tpcie at 2,0 {\n" "> +\t\t\t\tstatus = \"okay\";\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tpcie@3,0 {\n" + "> +\t\t\tpcie at 3,0 {\n" "> +\t\t\t\tstatus = \"okay\";\n" "> +\t\t\t};\n" "> +\t\t};\n" @@ -375,7 +356,7 @@ "> +\n" "> +\tsoc {\n" "> +\t\tinternal-regs {\n" - "> +\t\t\tpinctrl@18000 {\n" + "> +\t\t\tpinctrl at 18000 {\n" "> +\t\t\t\tcompatible = \"marvell,mv88f6928-pinctrl\";\n" "> +\t\t\t\treg = <0x18000 0x20>;\n" "> +\t\t\t};\n" @@ -449,12 +430,12 @@ "> +\t\t#size-cells = <0>;\n" "> +\t\tenable-method = \"marvell,armada-390-smp\";\n" "> +\n" - "> +\t\tcpu@0 {\n" + "> +\t\tcpu at 0 {\n" "> +\t\t\tdevice_type = \"cpu\";\n" "> +\t\t\tcompatible = \"arm,cortex-a9\";\n" "> +\t\t\treg = <0>;\n" "> +\t\t};\n" - "> +\t\tcpu@1 {\n" + "> +\t\tcpu at 1 {\n" "> +\t\t\tdevice_type = \"cpu\";\n" "> +\t\t\tcompatible = \"arm,cortex-a9\";\n" "> +\t\t\treg = <1>;\n" @@ -482,19 +463,19 @@ "> +\t\t\t#size-cells = <1>;\n" "> +\t\t\tranges = <0 MBUS_ID(0xf0, 0x01) 0 0x100000>;\n" "> +\n" - "> +\t\t\tscu@c000 {\n" + "> +\t\t\tscu at c000 {\n" "> +\t\t\t\tcompatible = \"arm,cortex-a9-scu\";\n" "> +\t\t\t\treg = <0xc000 0x100>;\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\ttimer@c600 {\n" + "> +\t\t\ttimer at c600 {\n" "> +\t\t\t\tcompatible = \"arm,cortex-a9-twd-timer\";\n" "> +\t\t\t\treg = <0xc600 0x20>;\n" "> +\t\t\t\tinterrupts = <GIC_PPI 13 (IRQ_TYPE_EDGE_RISING | GIC_CPU_MASK_SIMPLE(2))>;\n" "> +\t\t\t\tclocks = <&coreclk 2>;\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tgic: interrupt-controller@d000 {\n" + "> +\t\t\tgic: interrupt-controller at d000 {\n" "> +\t\t\t\tcompatible = \"arm,cortex-a9-gic\";\n" "> +\t\t\t\t#interrupt-cells = <3>;\n" "> +\t\t\t\t#size-cells = <0>;\n" @@ -503,7 +484,7 @@ "> +\t\t\t\t <0xc100 0x100>;\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tspi0: spi@10600 {\n" + "> +\t\t\tspi0: spi at 10600 {\n" "> +\t\t\t\tcompatible = \"marvell,orion-spi\";\n" "> +\t\t\t\treg = <0x10600 0x50>;\n" "> +\t\t\t\t#address-cells = <1>;\n" @@ -514,7 +495,7 @@ "> +\t\t\t\tstatus = \"disabled\";\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tspi1: spi@10680 {\n" + "> +\t\t\tspi1: spi at 10680 {\n" "> +\t\t\t\tcompatible = \"marvell,orion-spi\";\n" "> +\t\t\t\treg = <0x10680 0x50>;\n" "> +\t\t\t\t#address-cells = <1>;\n" @@ -525,7 +506,7 @@ "> +\t\t\t\tstatus = \"disabled\";\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\ti2c0: i2c@11000 {\n" + "> +\t\t\ti2c0: i2c at 11000 {\n" "> +\t\t\t\tcompatible = \"marvell,mv64xxx-i2c\";\n" "> +\t\t\t\treg = <0x11000 0x20>;\n" "> +\t\t\t\t#address-cells = <1>;\n" @@ -536,7 +517,7 @@ "> +\t\t\t\tstatus = \"disabled\";\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\ti2c1: i2c@11100 {\n" + "> +\t\t\ti2c1: i2c at 11100 {\n" "> +\t\t\t\tcompatible = \"marvell,mv64xxx-i2c\";\n" "> +\t\t\t\treg = <0x11100 0x20>;\n" "> +\t\t\t\t#address-cells = <1>;\n" @@ -547,7 +528,7 @@ "> +\t\t\t\tstatus = \"disabled\";\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\ti2c2: i2c@11200 {\n" + "> +\t\t\ti2c2: i2c at 11200 {\n" "> +\t\t\t\tcompatible = \"marvell,mv64xxx-i2c\";\n" "> +\t\t\t\treg = <0x11200 0x20>;\n" "> +\t\t\t\t#address-cells = <1>;\n" @@ -558,7 +539,7 @@ "> +\t\t\t\tstatus = \"disabled\";\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\ti2c3: i2c@11300 {\n" + "> +\t\t\ti2c3: i2c at 11300 {\n" "> +\t\t\t\tcompatible = \"marvell,mv64xxx-i2c\";\n" "> +\t\t\t\treg = <0x11300 0x20>;\n" "> +\t\t\t\t#address-cells = <1>;\n" @@ -569,7 +550,7 @@ "> +\t\t\t\tstatus = \"disabled\";\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tuart0: serial@12000 {\n" + "> +\t\t\tuart0: serial at 12000 {\n" "> +\t\t\t\tcompatible = \"snps,dw-apb-uart\";\n" "> +\t\t\t\treg = <0x12000 0x100>;\n" "> +\t\t\t\treg-shift = <2>;\n" @@ -579,7 +560,7 @@ "> +\t\t\t\tstatus = \"disabled\";\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tuart1: serial@12100 {\n" + "> +\t\t\tuart1: serial at 12100 {\n" "> +\t\t\t\tcompatible = \"snps,dw-apb-uart\";\n" "> +\t\t\t\treg = <0x12100 0x100>;\n" "> +\t\t\t\treg-shift = <2>;\n" @@ -589,7 +570,7 @@ "> +\t\t\t\tstatus = \"disabled\";\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tuart2: serial@12200 {\n" + "> +\t\t\tuart2: serial at 12200 {\n" "> +\t\t\t\tcompatible = \"snps,dw-apb-uart\";\n" "> +\t\t\t\treg = <0x12200 0x100>;\n" "> +\t\t\t\treg-shift = <2>;\n" @@ -599,7 +580,7 @@ "> +\t\t\t\tstatus = \"disabled\";\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tuart3: serial@12300 {\n" + "> +\t\t\tuart3: serial at 12300 {\n" "> +\t\t\t\tcompatible = \"snps,dw-apb-uart\";\n" "> +\t\t\t\treg = <0x12300 0x100>;\n" "> +\t\t\t\treg-shift = <2>;\n" @@ -609,7 +590,7 @@ "> +\t\t\t\tstatus = \"disabled\";\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tpinctrl@18000 {\n" + "> +\t\t\tpinctrl at 18000 {\n" "> +\t\t\t\ti2c0_pins: i2c0-pins {\n" "> +\t\t\t\t\tmarvell,pins = \"mpp2\", \"mpp3\";\n" "> +\t\t\t\t\tmarvell,function = \"i2c0\";\n" @@ -639,34 +620,34 @@ "> +\t\t\t\t};\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tsystem-controller@18200 {\n" + "> +\t\t\tsystem-controller at 18200 {\n" "> +\t\t\t\tcompatible = \"marvell,armada-390-system-controller\",\n" "> +\t\t\t\t\t \"marvell,armada-370-xp-system-controller\";\n" "> +\t\t\t\treg = <0x18200 0x100>;\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tgateclk: clock-gating-control@18220 {\n" + "> +\t\t\tgateclk: clock-gating-control at 18220 {\n" "> +\t\t\t\tcompatible = \"marvell,armada-390-gating-clock\";\n" "> +\t\t\t\treg = <0x18220 0x4>;\n" "> +\t\t\t\tclocks = <&coreclk 0>;\n" "> +\t\t\t\t#clock-cells = <1>;\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tcoreclk: mvebu-sar@18600 {\n" + "> +\t\t\tcoreclk: mvebu-sar at 18600 {\n" "> +\t\t\t\tcompatible = \"marvell,armada-390-core-clock\";\n" "> +\t\t\t\treg = <0x18600 0x04>;\n" "> +\t\t\t\t#clock-cells = <1>;\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tmbusc: mbus-controller@20000 {\n" + "> +\t\t\tmbusc: mbus-controller at 20000 {\n" "> +\t\t\t\tcompatible = \"marvell,mbus-controller\";\n" "> +\t\t\t\treg = <0x20000 0x100>, <0x20180 0x20>, <0x20250 0x8>;\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tmpic: interrupt-controller@20000 {\n" + "> +\t\t\tmpic: interrupt-controller at 20000 {\n" "\n" "it should be\n" - "\t\t\tmpic: interrupt-controller@20a00 {\n" + "\t\t\tmpic: interrupt-controller at 20a00 {\n" "\n" "\n" "Thanks,\n" @@ -683,7 +664,7 @@ "> +\t\t\t\tinterrupts = <GIC_PPI 15 IRQ_TYPE_LEVEL_HIGH>;\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\ttimer@20300 {\n" + "> +\t\t\ttimer at 20300 {\n" "> +\t\t\t\tcompatible = \"marvell,armada-380-timer\",\n" "> +\t\t\t\t\t \"marvell,armada-xp-timer\";\n" "> +\t\t\t\treg = <0x20300 0x30>, <0x21040 0x30>;\n" @@ -697,18 +678,18 @@ "> +\t\t\t\tclock-names = \"nbclk\", \"fixed\";\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tcpurst@20800 {\n" + "> +\t\t\tcpurst at 20800 {\n" "> +\t\t\t\tcompatible = \"marvell,armada-370-cpu-reset\";\n" "> +\t\t\t\treg = <0x20800 0x10>;\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tpmsu@22000 {\n" + "> +\t\t\tpmsu at 22000 {\n" "> +\t\t\t\tcompatible = \"marvell,armada-390-pmsu\",\n" "> +\t\t\t\t\t \"marvell,armada-380-pmsu\";\n" "> +\t\t\t\treg = <0x22000 0x1000>;\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\txor@60800 {\n" + "> +\t\t\txor at 60800 {\n" "> +\t\t\t\tcompatible = \"marvell,orion-xor\";\n" "> +\t\t\t\treg = <0x60800 0x100\n" "> +\t\t\t\t 0x60a00 0x100>;\n" @@ -728,7 +709,7 @@ "> +\t\t\t\t};\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\txor@60900 {\n" + "> +\t\t\txor at 60900 {\n" "> +\t\t\t\tcompatible = \"marvell,orion-xor\";\n" "> +\t\t\t\treg = <0x60900 0x100\n" "> +\t\t\t\t 0x60b00 0x100>;\n" @@ -748,7 +729,7 @@ "> +\t\t\t\t};\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tflash@d0000 {\n" + "> +\t\t\tflash at d0000 {\n" "> +\t\t\t\tcompatible = \"marvell,armada370-nand\";\n" "> +\t\t\t\treg = <0xd0000 0x54>;\n" "> +\t\t\t\t#address-cells = <1>;\n" @@ -758,7 +739,7 @@ "> +\t\t\t\tstatus = \"disabled\";\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tsdhci@d8000 {\n" + "> +\t\t\tsdhci at d8000 {\n" "> +\t\t\t\tcompatible = \"marvell,armada-380-sdhci\";\n" "> +\t\t\t\treg = <0xd8000 0x1000>, <0xdc000 0x100>;\n" "> +\t\t\t\tinterrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -767,7 +748,7 @@ "> +\t\t\t\tstatus = \"disabled\";\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tcoredivclk: clock@e4250 {\n" + "> +\t\t\tcoredivclk: clock at e4250 {\n" "> +\t\t\t\tcompatible = \"marvell,armada-390-corediv-clock\",\n" "> +\t\t\t\t\t \"marvell,armada-380-corediv-clock\";\n" "> +\t\t\t\treg = <0xe4250 0xc>;\n" @@ -805,9 +786,9 @@ "> +\t\t\t/*\n" "> +\t\t\t * This port can be either x4 or x1. When\n" "> +\t\t\t * configured in x4 by the bootloader, then\n" - "> +\t\t\t * pcie@4,0 is not available.\n" + "> +\t\t\t * pcie at 4,0 is not available.\n" "> +\t\t\t */\n" - "> +\t\t\tpcie@1,0 {\n" + "> +\t\t\tpcie at 1,0 {\n" "> +\t\t\t\tdevice_type = \"pci\";\n" "> +\t\t\t\tassigned-addresses = <0x82000800 0 0x80000 0 0x2000>;\n" "> +\t\t\t\treg = <0x0800 0 0 0 0>;\n" @@ -825,7 +806,7 @@ "> +\t\t\t};\n" "> +\n" "> +\t\t\t/* x1 port */\n" - "> +\t\t\tpcie@2,0 {\n" + "> +\t\t\tpcie at 2,0 {\n" "> +\t\t\t\tdevice_type = \"pci\";\n" "> +\t\t\t\tassigned-addresses = <0x82000800 0 0x40000 0 0x2000>;\n" "> +\t\t\t\treg = <0x1000 0 0 0 0>;\n" @@ -843,7 +824,7 @@ "> +\t\t\t};\n" "> +\n" "> +\t\t\t/* x1 port */\n" - "> +\t\t\tpcie@3,0 {\n" + "> +\t\t\tpcie at 3,0 {\n" "> +\t\t\t\tdevice_type = \"pci\";\n" "> +\t\t\t\tassigned-addresses = <0x82000800 0 0x44000 0 0x2000>;\n" "> +\t\t\t\treg = <0x1800 0 0 0 0>;\n" @@ -861,10 +842,10 @@ "> +\t\t\t};\n" "> +\n" "> +\t\t\t/*\n" - "> +\t\t\t * x1 port only available when pcie@1,0 is\n" + "> +\t\t\t * x1 port only available when pcie at 1,0 is\n" "> +\t\t\t * configured as a x1 port\n" "> +\t\t\t */\n" - "> +\t\t\tpcie@4,0 {\n" + "> +\t\t\tpcie at 4,0 {\n" "> +\t\t\t\tdevice_type = \"pci\";\n" "> +\t\t\t\tassigned-addresses = <0x82000800 0 0x48000 0 0x2000>;\n" "> +\t\t\t\treg = <0x2000 0 0 0 0>;\n" @@ -901,4 +882,4 @@ "development, consulting, training and support.\n" http://free-electrons.com -af1f356ede7ffed77f0fc9e1658b0482405f07d5190ba2e359daf2cd84851f6c +68c093820338b34d12ba4f082b5c16b599d0f138dca28103a05578f4e60fa440
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.