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Message-ID: <54F0E67B.5080409@ezchip.com>
Date: Fri, 27 Feb 2015 16:49:47 -0500
From: Chris Metcalf <cmetcalf@ezchip.com>
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Subject: Re: [Qemu-devel] [PATCH 1/6 v4] target-tilegx: Firstly add to qemu
 with minimized features
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To: =?UTF-8?B?QW5kcmVhcyBGw6RyYmVy?= <afaerber@suse.de>, Chen Gang S <gang.chen@sunrus.com.cn>
Cc: Peter Maydell <peter.maydell@linaro.org>, "walt@tilera.com" <walt@tilera.com>, Riku Voipio <riku.voipio@iki.fi>, qemu-devel <qemu-devel@nongnu.org>, "rth@twiddle.net" <rth@twiddle.net>

On 2/27/2015 12:36 PM, Andreas F=C3=A4rber wrote:
> "TILE-Gx" according to
> http://www.tilera.com/products/?ezchip=3D585&spage=3D614  - please fix
> wherever used in textual form.

Yes, really only "tilegx" or "TILE-Gx" should be used.  In type names I agr=
ee that TileGX is probably clearer than any alternatives.

> What about CPU models? Do the Gx72, Gx36, etc. differ only in core count
> or also in instruction set features?

 From a userspace perspective, it's mostly the core count.  They also have =
a different set of on-chip hardware accelerators, etc., but that's out of s=
cope for this project.

--=20
Chris Metcalf, EZChip Semiconductor
http://www.ezchip.com