Re: [PATCH] xen/arm: gic: GICv2 & GICv3 only supports 1020 physical interrupts

[Julien Grall <julien.grall@linaro.org>]

Hi Ian,

On 05/03/2015 19:00, Ian Campbell wrote:
> On Tue, 2015-03-03 at 16:35 +0000, Julien Grall wrote:
>> +    gicv3_info.nr_lines = min((unsigned)1020, nr_lines);
>
> "1020U" is the correct way to write (unsigned)1020 I think (in both
> places).

I gave a look on several usage of min in arch/arm and (unsigned) was used.

Anyway, I guess 1020U is fine. I will use it.

>
> Otherwise looks ok, although I had to look twice to figure out that the
> register initialisation was the same afterwards.
>
> Where does this value get used? Can you spell it out in the commit log
> please.

This value is used to check if we can route the IRQ to Xen/a Guest.

For instance, using IRQ 1023-1024 in the LRs is unpredictable. So we 
have to catch it earlier. Even though, the hardware domain should not 
have the permission to control it.

> In particular are you sure that there are no usages which assume this is
> a multiple of 32?

The only place where we require a multiple of 32 is the vGIC emulation. 
Although, I have a patch with use DIV_ROUND_UP but I forgot to send with 
this patch.

I will resend both together.

Regards,

-- 
Julien Grall