From mboxrd@z Thu Jan  1 00:00:00 1970
From: Julien Grall <julien.grall@linaro.org>
Subject: Re: [PATCH v3 0/2] Add support for Xilinx ZynqMP SoC
Date: Tue, 10 Mar 2015 11:30:10 +0000
Message-ID: <54FED5C2.50903@linaro.org>
References: <1425955798-7530-1-git-send-email-edgar.iglesias@gmail.com>
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To: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>, xen-devel@lists.xen.org
Cc: tim@xen.org, stefano.stabellini@citrix.com, ian.campbell@citrix.com
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Hello Edgar,

Thank you for adding support of the ZynqMP.

On 10/03/15 02:49, Edgar E. Iglesias wrote:
> From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
> 
> Adds support for the Cadence UART in Xilinx ZynqMP. The
> rest of the ZynqMP platform is discovered via device-tree.

Did you make sure that the default grant table range (0xb0000000 -
0xb0020000) don't overlap with an hardware region?

Regards,

-- 
Julien Grall