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From: Joe Konno <joe.konno at linux.intel.com>
To: powertop@lists.01.org
Subject: Re: [Powertop] [PATCH] Fix Powertop support for Intel Braswell SOC
Date: Fri, 13 Mar 2015 13:18:31 -0700	[thread overview]
Message-ID: <55034617.5040507@linux.intel.com> (raw)
In-Reply-To: 1425663975-7522-1-git-send-email-david.e.box@linux.intel.com

[-- Attachment #1: Type: text/plain, Size: 2519 bytes --]

One minor nit. Otherwise,

Tested-by: Joe Konno <joe.konno(a)intel.com>

On 03/06/2015 09:46 AM, David E. Box wrote:
> Correct Braswell MSR used to determine PC6 residency.
> 
> Signed-off-by: David E. Box <david.e.box(a)linux.intel.com>
> ---
>  src/cpu/intel_cpus.cpp | 21 +++++++++++++++++++--
>  src/cpu/intel_cpus.h   |  1 +
>  2 files changed, 20 insertions(+), 2 deletions(-)
> 
> diff --git a/src/cpu/intel_cpus.cpp b/src/cpu/intel_cpus.cpp
> index 72ecd50..baea8fc 100644
> --- a/src/cpu/intel_cpus.cpp
> +++ b/src/cpu/intel_cpus.cpp
> @@ -289,6 +289,7 @@ nhm_package::nhm_package(int model)
>  	has_c8c9c10_res = 0;
>  	has_c2c6_res = 0;
>  	has_c7_res = 0;
> +	has_c6c_res = 0;
>  
>  	switch(model) {
>  		case 0x2A:	/* SNB */
> @@ -314,6 +315,9 @@ nhm_package::nhm_package(int model)
>  		else
>  			has_c7_res = 0;
>  	}
> +	/* BSW only exposes package C6 */
> +	else if (model == 0x4C)
> +		has_c6c_res=1;

Nit: whitespace around '=' inconsistent with surrounding code.

>  	else
>  		has_c3_res = 1;
>  
> @@ -360,7 +364,15 @@ void nhm_package::measurement_start(void)
>  
>  	if (this->has_c3_res)
>  		c3_before    = get_msr(number, MSR_PKG_C3_RESIDENCY);
> -	c6_before    = get_msr(number, MSR_PKG_C6_RESIDENCY);
> +
> +	/*
> +	 * Hack for Braswell where C7 MSR is actually BSW C6
> +	 */
> +	if (this->has_c6c_res)
> +		c6_before    = get_msr(number, MSR_PKG_C7_RESIDENCY);
> +	else
> +		c6_before    = get_msr(number, MSR_PKG_C6_RESIDENCY);
> +
>  	if (this->has_c7_res)
>  		c7_before    = get_msr(number, MSR_PKG_C7_RESIDENCY);
>  	if (this->has_c8c9c10_res) {
> @@ -401,7 +413,12 @@ void nhm_package::measurement_end(void)
>  
>  	if (this->has_c3_res)
>  		c3_after    = get_msr(number, MSR_PKG_C3_RESIDENCY);
> -	c6_after    = get_msr(number, MSR_PKG_C6_RESIDENCY);
> +
> +	if (this->has_c6c_res)
> +		c6_after    = get_msr(number, MSR_PKG_C7_RESIDENCY);
> +	else
> +		c6_after    = get_msr(number, MSR_PKG_C6_RESIDENCY);
> +
>  	if (this->has_c7_res)
>  		c7_after    = get_msr(number, MSR_PKG_C7_RESIDENCY);
>  	if (has_c8c9c10_res) {
> diff --git a/src/cpu/intel_cpus.h b/src/cpu/intel_cpus.h
> index 810a243..0331069 100644
> --- a/src/cpu/intel_cpus.h
> +++ b/src/cpu/intel_cpus.h
> @@ -77,6 +77,7 @@ public:
>  	int		has_c7_res;
>  	int		has_c2c6_res;
>  	int		has_c3_res;
> +	int		has_c6c_res;		/* BSW */
>  	int		has_c8c9c10_res;
>  	nhm_package(int model);
>  	virtual void	measurement_start(void);
> 

             reply	other threads:[~2015-03-13 20:18 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-03-13 20:18 Joe Konno [this message]
  -- strict thread matches above, loose matches on Subject: below --
2015-03-06 17:46 [Powertop] [PATCH] Fix Powertop support for Intel Braswell SOC David E. Box

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