From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stephen Warren Subject: Re: [PATCH] ARM: trusted_foundations: Maintain CPU endianness Date: Fri, 20 Mar 2015 10:07:07 -0600 Message-ID: <550C45AB.3070703@wwwdotorg.org> References: <1426865807-22981-1-git-send-email-digetx@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1426865807-22981-1-git-send-email-digetx-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> Sender: linux-tegra-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Dmitry Osipenko Cc: Thierry Reding , Alexandre Courbot , linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Russell King , linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org List-Id: linux-tegra@vger.kernel.org On 03/20/2015 09:36 AM, Dmitry Osipenko wrote: > Convert CPU reset vector address to LE to support big-endian kernel. Naively this sounds a little odd; the value here is in a CPU register all the time, not in memory, so I'm not sure why endianness is relevant? Presumably the CPU doesn't end up byte-swapping values in registers when running in BE mode or it takes an SMC? If it does, why don't we need cpu_to_le32(TF_SET_CPU_BOOT_ADDR_SMC) too? Sorry if this is a silly question; I haven't followed any of the BE kernel patches. From mboxrd@z Thu Jan 1 00:00:00 1970 From: swarren@wwwdotorg.org (Stephen Warren) Date: Fri, 20 Mar 2015 10:07:07 -0600 Subject: [PATCH] ARM: trusted_foundations: Maintain CPU endianness In-Reply-To: <1426865807-22981-1-git-send-email-digetx@gmail.com> References: <1426865807-22981-1-git-send-email-digetx@gmail.com> Message-ID: <550C45AB.3070703@wwwdotorg.org> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On 03/20/2015 09:36 AM, Dmitry Osipenko wrote: > Convert CPU reset vector address to LE to support big-endian kernel. Naively this sounds a little odd; the value here is in a CPU register all the time, not in memory, so I'm not sure why endianness is relevant? Presumably the CPU doesn't end up byte-swapping values in registers when running in BE mode or it takes an SMC? If it does, why don't we need cpu_to_le32(TF_SET_CPU_BOOT_ADDR_SMC) too? Sorry if this is a silly question; I haven't followed any of the BE kernel patches. From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751397AbbCTQHN (ORCPT ); Fri, 20 Mar 2015 12:07:13 -0400 Received: from avon.wwwdotorg.org ([70.85.31.133]:55990 "EHLO avon.wwwdotorg.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751339AbbCTQHK (ORCPT ); Fri, 20 Mar 2015 12:07:10 -0400 Message-ID: <550C45AB.3070703@wwwdotorg.org> Date: Fri, 20 Mar 2015 10:07:07 -0600 From: Stephen Warren User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.4.0 MIME-Version: 1.0 To: Dmitry Osipenko CC: Thierry Reding , Alexandre Courbot , linux-tegra@vger.kernel.org, Russell King , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] ARM: trusted_foundations: Maintain CPU endianness References: <1426865807-22981-1-git-send-email-digetx@gmail.com> In-Reply-To: <1426865807-22981-1-git-send-email-digetx@gmail.com> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 03/20/2015 09:36 AM, Dmitry Osipenko wrote: > Convert CPU reset vector address to LE to support big-endian kernel. Naively this sounds a little odd; the value here is in a CPU register all the time, not in memory, so I'm not sure why endianness is relevant? Presumably the CPU doesn't end up byte-swapping values in registers when running in BE mode or it takes an SMC? If it does, why don't we need cpu_to_le32(TF_SET_CPU_BOOT_ADDR_SMC) too? Sorry if this is a silly question; I haven't followed any of the BE kernel patches.