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From: James Sullivan <sullivan.james.f@gmail.com>
To: qemu-devel@nongnu.org
Cc: pbonzini@redhat.com, mst@redhat.com
Subject: Re: [Qemu-devel] [PATCH] apic: Implement low-priority arbitration for IRQ delivery
Date: Tue, 24 Mar 2015 13:16:00 -0600	[thread overview]
Message-ID: <5511B7F0.6090900@gmail.com> (raw)
In-Reply-To: <1427149572-11378-1-git-send-email-sullivan.james.f@gmail.com>

Merging this into
<1427224426-9025-1-git-send-email-sullivan.james.f@gmail.com>.

On 03/23/2015 04:26 PM, James Sullivan wrote:
> Currently, there is no arbitration among processors for low priority IRQ
> delivery. Implemented apic_get_arb_pri(), and added two new functions
> apic_compare_prio() and apic_lowest_prio() to support arbitration in
> apic_bus_deliver().
> 
> Signed-off-by: James Sullivan <sullivan.james.f@gmail.com>
> ---
>  hw/intc/apic.c | 67 ++++++++++++++++++++++++++++++++++++++++++----------------
>  1 file changed, 49 insertions(+), 18 deletions(-)
> 
> diff --git a/hw/intc/apic.c b/hw/intc/apic.c
> index 0f97b47..47d2fb1 100644
> --- a/hw/intc/apic.c
> +++ b/hw/intc/apic.c
> @@ -38,6 +38,7 @@ static void apic_set_irq(APICCommonState *s, int vector_num, int trigger_mode);
>  static void apic_update_irq(APICCommonState *s);
>  static void apic_get_delivery_bitmask(uint32_t *deliver_bitmask,
>                                        uint8_t dest, uint8_t dest_mode);
> +static int apic_get_arb_pri(APICCommonState *s);
>  
>  /* Find first bit starting from msb */
>  static int apic_fls_bit(uint32_t value)
> @@ -199,6 +200,29 @@ static void apic_external_nmi(APICCommonState *s)
>      apic_local_deliver(s, APIC_LVT_LINT1);
>  }
>  
> +static int apic_compare_prio(struct APICCommonState *cpu1,
> +                             struct APICCommonState *cpu2)
> +{
> +    return apic_get_arb_pri(cpu1) - apic_get_arb_pri(cpu2);
> +}
> +
> +static struct APICCommonState *apic_lowest_prio(const uint32_t
> +                                                *deliver_bitmask)
> +{
> +    APICCommonState *lowest = NULL;
> +    int i, d;
> +
> +    for (i = 0; i < MAX_APIC_WORDS; i++) {
> +        if (deliver_bitmask[i]) {
> +            d = i * 32 + apic_ffs_bit(deliver_bitmask[i]);
> +            if (!lowest || apic_compare_prio(local_apics[d], lowest) < 0) {
> +                lowest = local_apics[d];
> +            }
> +        }
> +    }
> +    return lowest;
> +}
> +
>  #define foreach_apic(apic, deliver_bitmask, code) \
>  {\
>      int __i, __j;\
> @@ -225,22 +249,10 @@ static void apic_bus_deliver(const uint32_t *deliver_bitmask,
>  
>      switch (delivery_mode) {
>          case APIC_DM_LOWPRI:
> -            /* XXX: search for focus processor, arbitration */
> -            {
> -                int i, d;
> -                d = -1;
> -                for(i = 0; i < MAX_APIC_WORDS; i++) {
> -                    if (deliver_bitmask[i]) {
> -                        d = i * 32 + apic_ffs_bit(deliver_bitmask[i]);
> -                        break;
> -                    }
> -                }
> -                if (d >= 0) {
> -                    apic_iter = local_apics[d];
> -                    if (apic_iter) {
> -                        apic_set_irq(apic_iter, vector_num, trigger_mode);
> -                    }
> -                }
> +            /* XXX: search for focus processor */
> +            apic_iter = apic_lowest_prio(deliver_bitmask);
> +            if (apic_iter) {
> +                apic_set_irq(apic_iter , vector_num, trigger_mode);
>              }
>              return;
>  
> @@ -336,8 +348,27 @@ static int apic_get_ppr(APICCommonState *s)
>  
>  static int apic_get_arb_pri(APICCommonState *s)
>  {
> -    /* XXX: arbitration */
> -    return 0;
> +    int tpr, isrv, irrv, apr;
> +
> +    tpr = apic_get_tpr(s);
> +    isrv = get_highest_priority_int(s->isr);
> +    if (isrv < 0) {
> +        isrv = 0;
> +    }
> +    isrv >>= 4;
> +    irrv = get_highest_priority_int(s->irr);
> +    if (irrv < 0) {
> +        irrv = 0;
> +    }
> +    irrv >>= 4;
> +
> +    if ((tpr >= irrv) && (tpr > isrv)) {
> +        apr = s->tpr & 0xff;
> +    } else {
> +        apr = ((tpr & isrv) > irrv) ? (tpr & isrv) : irrv;
> +        apr <<= 4;
> +    }
> +    return apr;
>  }
>  
>  
> 

      reply	other threads:[~2015-03-24 19:18 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-03-23 22:26 [Qemu-devel] [PATCH] apic: Implement low-priority arbitration for IRQ delivery James Sullivan
2015-03-24 19:16 ` James Sullivan [this message]

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