From mboxrd@z Thu Jan 1 00:00:00 1970 Return-path: Message-ID: <5512845E.40804@arm.com> Date: Wed, 25 Mar 2015 09:48:14 +0000 From: Marc Zyngier MIME-Version: 1.0 Subject: Re: [RFC 1/4] arm64: kvm: add a cpu tear-down function References: <1427111639-4575-1-git-send-email-takahiro.akashi@linaro.org> <1427111639-4575-2-git-send-email-takahiro.akashi@linaro.org> <551135AE.1080401@arm.com> <55126C6F.2080500@linaro.org> In-Reply-To: <55126C6F.2080500@linaro.org> List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "kexec" Errors-To: kexec-bounces+dwmw2=infradead.org@lists.infradead.org To: AKASHI Takahiro , Catalin Marinas , Will Deacon , Mark Rutland Cc: "linux-arm-kernel@lists.infradead.org" , "linaro-kernel@lists.linaro.org" , "geoff@infradead.org" , "kexec@lists.infradead.org" , "linux-kernel@vger.kernel.org" , "broonie@kernel.org" , "david.griego@linaro.org" , "christoffer.dall@linaro.org" , "freddy77@gmail.com" Hi Takahiro, On 25/03/15 08:06, AKASHI Takahiro wrote: >>> + /* Switch back to boot page tables */ >>> + msr ttbr0_el2, x0 >>> + isb >> >> This is the place where you want TLBI to occur. > > Will remove tlbi above and put it here. There is only need for one TLBI, if at all. >>> + /* Branch into PA space */ >>> + adr x0, 1f >>> + bfi x1, x0, #0, #PAGE_SHIFT >>> + br x1 >>> + >>> + /* We're now in idmap */ >>> +1: /* Invalidate the old TLBs again */ >>> + tlbi alle2 >>> + dsb sy >> >> See? This is the only TLBI that actually makes sense. Now, given that >> you are actually disabling the MMU, I'm not sure these TBLIs make much >> sense. > > Probably you're right, but > otherwise, I guess, bogus TLB might remain and be used when MMU get enabled again. > (MMU setting would be the same across disabling/enabling hyp mode though.) Anyone enabling the MMU must invalidate the TLB before doing so (we've been caught by that before). Invalidation on the way out doesn't hurt, but it also give a false sense of security. I'll leave it up to you. Thanks, M. -- Jazz is not dead. It just smells funny... _______________________________________________ kexec mailing list kexec@lists.infradead.org http://lists.infradead.org/mailman/listinfo/kexec From mboxrd@z Thu Jan 1 00:00:00 1970 From: marc.zyngier@arm.com (Marc Zyngier) Date: Wed, 25 Mar 2015 09:48:14 +0000 Subject: [RFC 1/4] arm64: kvm: add a cpu tear-down function In-Reply-To: <55126C6F.2080500@linaro.org> References: <1427111639-4575-1-git-send-email-takahiro.akashi@linaro.org> <1427111639-4575-2-git-send-email-takahiro.akashi@linaro.org> <551135AE.1080401@arm.com> <55126C6F.2080500@linaro.org> Message-ID: <5512845E.40804@arm.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Hi Takahiro, On 25/03/15 08:06, AKASHI Takahiro wrote: >>> + /* Switch back to boot page tables */ >>> + msr ttbr0_el2, x0 >>> + isb >> >> This is the place where you want TLBI to occur. > > Will remove tlbi above and put it here. There is only need for one TLBI, if at all. >>> + /* Branch into PA space */ >>> + adr x0, 1f >>> + bfi x1, x0, #0, #PAGE_SHIFT >>> + br x1 >>> + >>> + /* We're now in idmap */ >>> +1: /* Invalidate the old TLBs again */ >>> + tlbi alle2 >>> + dsb sy >> >> See? This is the only TLBI that actually makes sense. Now, given that >> you are actually disabling the MMU, I'm not sure these TBLIs make much >> sense. > > Probably you're right, but > otherwise, I guess, bogus TLB might remain and be used when MMU get enabled again. > (MMU setting would be the same across disabling/enabling hyp mode though.) Anyone enabling the MMU must invalidate the TLB before doing so (we've been caught by that before). Invalidation on the way out doesn't hurt, but it also give a false sense of security. I'll leave it up to you. Thanks, M. -- Jazz is not dead. It just smells funny... From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751830AbbCYJsU (ORCPT ); Wed, 25 Mar 2015 05:48:20 -0400 Received: from foss.arm.com ([217.140.101.70]:50274 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750819AbbCYJsS (ORCPT ); Wed, 25 Mar 2015 05:48:18 -0400 Message-ID: <5512845E.40804@arm.com> Date: Wed, 25 Mar 2015 09:48:14 +0000 From: Marc Zyngier Organization: ARM Ltd User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Icedove/31.4.0 MIME-Version: 1.0 To: AKASHI Takahiro , Catalin Marinas , Will Deacon , Mark Rutland CC: "christoffer.dall@linaro.org" , "geoff@infradead.org" , "broonie@kernel.org" , "david.griego@linaro.org" , "freddy77@gmail.com" , "kexec@lists.infradead.org" , "linux-arm-kernel@lists.infradead.org" , "linaro-kernel@lists.linaro.org" , "linux-kernel@vger.kernel.org" Subject: Re: [RFC 1/4] arm64: kvm: add a cpu tear-down function References: <1427111639-4575-1-git-send-email-takahiro.akashi@linaro.org> <1427111639-4575-2-git-send-email-takahiro.akashi@linaro.org> <551135AE.1080401@arm.com> <55126C6F.2080500@linaro.org> In-Reply-To: <55126C6F.2080500@linaro.org> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Takahiro, On 25/03/15 08:06, AKASHI Takahiro wrote: >>> + /* Switch back to boot page tables */ >>> + msr ttbr0_el2, x0 >>> + isb >> >> This is the place where you want TLBI to occur. > > Will remove tlbi above and put it here. There is only need for one TLBI, if at all. >>> + /* Branch into PA space */ >>> + adr x0, 1f >>> + bfi x1, x0, #0, #PAGE_SHIFT >>> + br x1 >>> + >>> + /* We're now in idmap */ >>> +1: /* Invalidate the old TLBs again */ >>> + tlbi alle2 >>> + dsb sy >> >> See? This is the only TLBI that actually makes sense. Now, given that >> you are actually disabling the MMU, I'm not sure these TBLIs make much >> sense. > > Probably you're right, but > otherwise, I guess, bogus TLB might remain and be used when MMU get enabled again. > (MMU setting would be the same across disabling/enabling hyp mode though.) Anyone enabling the MMU must invalidate the TLB before doing so (we've been caught by that before). Invalidation on the way out doesn't hurt, but it also give a false sense of security. I'll leave it up to you. Thanks, M. -- Jazz is not dead. It just smells funny...