From mboxrd@z Thu Jan  1 00:00:00 1970
From: Julien Grall <julien.grall@linaro.org>
Subject: Re: [PATCH 08/12] xen: arm: Handle CP14 32-bit register
 accesses from userspace
Date: Wed, 25 Mar 2015 19:05:22 +0000
Message-ID: <551306F2.1030503@linaro.org>
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	<1427293356-5714-8-git-send-email-ian.campbell@citrix.com>
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Hi Ian,

On 25/03/15 14:22, Ian Campbell wrote:
> Accesses to these from 32-bit userspace would cause a hypervisor
> exception (host crash) when running a 64-bit kernel, which is worked
> around by the fix to XSA-102. On 32-bit kernels they would be
> implemented as RAZ/WI which is incorrect but harmless.
> 
> Update as follows:
>  - DBGDSCRINT should be R/O.
>  - DBGDSCREXT should be EL1 only.
>  - DBGOSLAR is RO and EL1 only.

This register is WO. Actually the implementation is right, just the
commit message.

Other than that:

Reviewed-by: Julien Grall <julien.grall@linaro.org>

Regards,

-- 
Julien Grall