From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54112) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Yb46e-0003h3-IY for qemu-devel@nongnu.org; Thu, 26 Mar 2015 05:29:41 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Yb46b-0000lC-QT for qemu-devel@nongnu.org; Thu, 26 Mar 2015 05:29:40 -0400 Received: from mailapp01.imgtec.com ([195.59.15.196]:64482) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Yb46b-0000kX-KQ for qemu-devel@nongnu.org; Thu, 26 Mar 2015 05:29:37 -0400 Message-ID: <5513D17A.20807@imgtec.com> Date: Thu, 26 Mar 2015 09:29:30 +0000 From: Leon Alrae MIME-Version: 1.0 References: <8111192.6dZICC2BlA@lczc1207b1zdcs> <1842470.gfsf2eU3Vx@lczc1207b1zdcs> <5512F187.1080108@imgtec.com> <2216707.mRbZzWlcAX@lczc1207b1zdcs> In-Reply-To: <2216707.mRbZzWlcAX@lczc1207b1zdcs> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] Support for NetLogic XLP Processors List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Duarte Silva Cc: James Hogan , qemu-devel@nongnu.org Hi Duarte, On 25/03/2015 23:54, Duarte Silva wrote: > On Wednesday 25 March 2015 17:33:59 Leon Alrae wrote: >> On 25/03/2015 15:38, Duarte Silva wrote: >>> On Wednesday 25 March 2015 14:54:41 Leon Alrae wrote: >>>> On 25/03/2015 14:44, Leon Alrae wrote: >>>>> Hi Duarte, >>>>> >>>>> On 25/03/2015 14:20, Duarte Silva wrote: >>>>>> On Wednesday 25 March 2015 13:13:14 James Hogan wrote: >>>>>>> Hi Duarte, >>>>>>> >>>>>>> On 22/03/15 11:13, Duarte Silva wrote: >>>>>>>> Hi guys, >>>>>>>> >>>>>>>> I have been struggling to get some binaries compiled for NetLogi= c XLP >>>>>>>> processor to run under QEMU. I have tried a bunch of things (mos= t >>>>>>>> going >>>>>>>> back and forth) and always get the following error message: >>>>>>>> >>>>>>>> qemu: uncaught target signal 4 (Illegal instruction) - core dump= ed >>>>>>>> Illegal instruction >>>>>>>> >>>>>>>> I tried to debug it using GDB but to no avail. Does anybody have >>>>>>>> ideas? >>>>>>>> I'm >>>>>>>> running QEMU 2.2.1. >>>>>>> >>>>>>> It sounds like the program had an instruction that QEMU doesn't >>>>>>> recognise, or doesn't think should be allowed on the current CPU = which >>>>>>> you've set with -cpu. You might be able to find out what that >>>>>>> >>>>>>> instruction is by putting this on your qemu command line: >>>>>>> -singlestep -d in_asm >>>>>> >>>>>> Hi James, >>>>>> >>>>>> thanks for the help :) I have tried with all the CPU's available. = None >>>>>> of >>>>>> them worked, so I just leave it as undefined. It seems the offendi= ng >>>>>> instruction is "udi4". >>>>>> >>>>>> (...) >>>>>> IN: >>>>>> 0x765d1fa4: udi4 a0,v0,zero,0x0 >>>>> >>>>> According to this line you are trying to use MIPS32 CPU whereas I >>>>> presume you would like MIPS64R2? Please try 5KEf CPU for example wh= ich >>>>> is available in qemu-mips64 and qemu-mips64el QEMU binaries for big= and >>>>> little endian respectively. >>>> >>>> I just noticed the QEMU version you are using and it doesn't contain >>>> 5KEf and 5KEc CPUs. Please try MIPS64R2-generic. >>>> >>>> Leon >>> >>> Hi Leon, >>> >>> have a look at the "binary-info.txt" file in the first e-Mail. It doe= s use >>> the ELF magic for 32 bits ELF, not the 64 bits, that's why I get the >>> following: >>> >>> # chroot rootfs/ /usr/local/bin/qemu-mips64 -cpu MIPS64R2-generic /bi= n/sh >>> /bin/sh: Invalid ELF image for this architecture >>> >>> Is there a way to force the execution of the binary even if the flag >>> doesn't match? >>> >>> Also, if you have a look at the flags you get: noreorder, cpic, 32bit= mode, >>> unknown CPU, o32, mips64r2. So, is it 64 bits or 32 bits ELF file? >> >> I see, this mips64r2 binary has o32 ABI. It indeed would work in >> qemu-mips provided there are no mips64r2-specific instructions. I thin= k >> I jumped a bit too quickly to the conclusion. >> >> QEMU's mips/disas doesn't help much in this case as it just indicates >> User Defined Instruction. Presumably this instruction is specific to >> this processor and is missing in QEMU. Are you able to get disassembly >> of your program and look up what is under 0x765d1fa4 address which >> caused the illegal instruction? >=20 > Hi Leon, >=20 > using IDA with a remote debug session to QEMU I got the following disa= ssembly=20 > (kept surrounding instructions to give some context). To IDA, this cust= om=20 > instruction is also unknown. >=20 > MEMORY:765D1F90 sw $v1, 4($v0) > MEMORY:765D1F94 addu $a0, $a1 > MEMORY:765D1F98 sw $a0, 0($v0) > MEMORY:765D1F9C > MEMORY:765D1F9C loc_765D1F9C: > MEMORY:765D1F9C addiu $a0, $s1, 0x51B0 > MEMORY:765D1FA0 move $v0, $zero > MEMORY:765D1FA0 # ----------------------- > MEMORY:765D1FA4 .byte 0x70 # p > MEMORY:765D1FA5 .byte 0x82 # =C3=A9 > MEMORY:765D1FA6 .byte 0 > MEMORY:765D1FA7 .byte 0x14 > MEMORY:765D1FA8 # ----------------------- > MEMORY:765D1FA8 slti $v0, 2 > MEMORY:765D1FAC beqz $v0, loc_765D204C > MEMORY:765D1FB0 nop > MEMORY:765D1FB4 lw $ra, 0x24($sp) > MEMORY:765D1FB8 > MEMORY:765D1FB8 loc_765D1FB8: > MEMORY:765D1FB8 move $v0, $s0 > MEMORY:765D1FBC lw $s1, 0x20($sp) > MEMORY:765D1FC0 lw $s0, 0x1C($sp) According to binutils this is SWAPW which belongs to XLR: {"swapw", "t,b", 0x70000014, 0xfc00ffff, MOD_1|RD_2|LM|SM, 0, XLR, 0, 0 }, I'm afraid you won't be able to run binaries built for NetLogic XLP until someone implements these instructions in QEMU. Regards, Leon