Re: AW: problem with testing a CTR block cipher mode which is partially working

[Corentin LABBE <clabbe.montjoie-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>]

Le 30/03/2015 20:08, Markus Stockhausen a écrit :
>> Von: linux-crypto-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org [linux-crypto-owner-u79uwXL29TasMV2rI37PzA@public.gmane.orgorg]" im Auftrag von "Corentin LABBE [clabbe.montjoie-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org]
>> Gesendet: Montag, 30. März 2015 19:59
>> An: linux-crypto-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
>> Cc: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org
>> Betreff: problem with testing a CTR block cipher mode which is partially working
>>
>> hello
>>
>> I am trying to add the CTR (counter) block cipher mode for AES on my Security System driver.
>>
>> When testing with the tcrypt module I got the following result:
>> [ 1256.986989] alg: skcipher: Test 1 failed on encryption for ctr-aes-sunxi-ss
>> [ 1256.987004] 00000000: 87 4d 61 91 b6 20 e3 26 1b ef 68 64 99 0d b6 ce
>> [ 1256.987013] 00000010: 40 94 25 91 d7 b4 4f 49 ab c1 9d 33 a4 4e f6 54
>> [ 1256.987023] 00000020: ce 58 d2 f0 01 8f 92 a2 5f 2c bb 66 13 8b 9d 76
>> [ 1256.987032] 00000030: 30 fa 4a 40 b1 67 2e f3 46 b7 9a 7c ba 91 0b a2
>>
>> As you can see the first ciphered block is correct (according to testmgr.h), the subsequent blocks are bad.
>>
>> So Could I assume that the setting of key and IV are good (at least for the first cipher pass.
>>
>> The number of inputs(register) are limited and I have tested near all the possibility.
>> Any idea of what could be wrong.
>>
> 
> had a similar challenge a few months ago. I had to take care about
> 
> - counter IV is big endian (implemented it little endian in first place)
> - CTR allows to encrypt data that does not need to be amultiple of 16 bytes.
> 
> Markus
> 

Sorry but if I change endianness of anything, the first block became invalid.

I have tryed ctr(des) but the same problem rise, the first block (so the first 8bytes) are correctly ciphered then everything is bad.
So I suspect the hardware to not increasing counter between blocks, but why..


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