From mboxrd@z Thu Jan 1 00:00:00 1970 From: Paolo Bonzini Subject: Re: [PATCH v2 1/4] KVM: x86: INIT and reset sequences are different Date: Tue, 07 Apr 2015 15:23:11 +0200 Message-ID: <5523DA3F.5070006@redhat.com> References: <1427933438-12782-1-git-send-email-namit@cs.technion.ac.il> <1427933438-12782-2-git-send-email-namit@cs.technion.ac.il> Mime-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit Cc: kvm@vger.kernel.org To: Nadav Amit Return-path: Received: from mx1.redhat.com ([209.132.183.28]:46078 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753388AbbDGNXQ (ORCPT ); Tue, 7 Apr 2015 09:23:16 -0400 In-Reply-To: <1427933438-12782-2-git-send-email-namit@cs.technion.ac.il> Sender: kvm-owner@vger.kernel.org List-ID: On 02/04/2015 02:10, Nadav Amit wrote: > x86 architecture defines differences between the reset and INIT sequences. > INIT does not initialize the FPU (including MMX, XMM, YMM, etc.), TSC, PMU, > MSRs (in general), MTRRs machine-check, APIC ID, APIC arbitration ID and BSP. > > EFER is supposed NOT to be reset according to the SDM, but leaving the LMA and > LME untouched causes failed VM-entry. Therefore we reset EFER (although it is > unclear whether the rest of EFER bits should be reset). Do you get failed VM-entry even if LME=1, LMA=0? LMA obviously should be reset, but LME=1/PG=0/PAE=0 is shown as valid in Figure 4-1 of the SDM. Paolo