From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60808) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YfToI-0005Df-AO for qemu-devel@nongnu.org; Tue, 07 Apr 2015 09:45:02 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YfToD-0005MV-Iq for qemu-devel@nongnu.org; Tue, 07 Apr 2015 09:44:58 -0400 Received: from mx2.parallels.com ([199.115.105.18]:54111) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YfToD-0005MD-Cv for qemu-devel@nongnu.org; Tue, 07 Apr 2015 09:44:53 -0400 Message-ID: <5523DF4A.7050905@openvz.org> Date: Tue, 7 Apr 2015 16:44:42 +0300 From: "Denis V. Lunev" MIME-Version: 1.0 References: <1427932716-11800-1-git-send-email-namit@cs.technion.ac.il> <551D3768.9090404@redhat.com> <5523AE38.6000701@suse.de> <5523B2C6.5080601@redhat.com> <5523B518.5050902@suse.de> <5523B755.2080909@redhat.com> <5523BB00.3040404@suse.de> <5523C62E.6010507@suse.de> <5523D90A.1040604@redhat.com> <5523DAEC.6070605@openvz.org> <5523DBC2.2050007@redhat.com> In-Reply-To: <5523DBC2.2050007@redhat.com> Content-Type: text/plain; charset="windows-1252"; format=flowed Content-Transfer-Encoding: 8bit Subject: Re: [Qemu-devel] target-i386: clear bsp bit when designating bsp List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Paolo Bonzini , "Denis V. Lunev" , =?windows-1252?Q?Andreas_F=E4rber?= , qemu-devel@nongnu.org Cc: Eduardo Habkost , Nadav Amit , mst@redhat.com, Igor Mammedov , nadav.amit@gmail.com, rth@twiddle.net On 07/04/15 16:29, Paolo Bonzini wrote: > > > On 07/04/2015 15:26, Denis V. Lunev wrote: >> On 07/04/15 16:18, Paolo Bonzini wrote: >>> >>> >>> On 07/04/2015 13:57, Andreas Färber wrote: >>>>>> If this is some issue with sync'ing state back and forth before >>>>>> QEMU and >>>>>> KVM then the real issue has not been explained. >>>> Hm, hw/intc/apic_common.c:apic_reset_common() has: >>>> >>>> bsp = cpu_is_bsp(s->cpu); >>>> s->apicbase = APIC_DEFAULT_ADDRESS | >>>> (bsp ? MSR_IA32_APICBASE_BSP : 0) | MSR_IA32_APICBASE_ENABLE; >>>> >>>> What this is doing is really: >>>> >>>> bsp = cpu_get_apic_base(s->cpu->apic_state) & >>>> MSR_IA32_APICBASE_BSP; >>>> s->apicbase = APIC_DEFAULT_ADDRESS | >>>> (bsp ? MSR_IA32_APICBASE_BSP : 0) | MSR_IA32_APICBASE_ENABLE; >>>> >>>> Unless I'm missing something, since we are in the APIC device's reset >>>> function, this is effectively a twisted way of writing: >>>> >>>> bsp = s->apicbase & MSR_IA32_APICBASE_BSP; >>>> s->apicbase = APIC_DEFAULT_ADDRESS | >>>> (bsp ? MSR_IA32_APICBASE_BSP : 0) | MSR_IA32_APICBASE_ENABLE; >>> >>> Yes, this is more readable. >> >> just $0.02 :) >> >> why don't >> bsp = s->apicbase & MSR_IA32_APICBASE_BSP; >> s->apicbase = >> APIC_DEFAULT_ADDRESS | bsp | MSR_IA32_APICBASE_ENABLE; >> in this case. This looks the same from the textual point of view. > > Yes. Would you like to send a patch? > > Paolo > no prob, just give me 2 minutes. Side note, bsp will become uint32_t and we will loose tracepoint inside cpu_get_apic_base() on this path... Den