Re: Atheros 8035 PHY only works when at803x_config_init() is commented out

[Mason <slash.tmp@free.fr>]

On 09/04/2015 17:32, Daniel Mack wrote:

> What about the debug registers, such as the one that configures the
> RGMII TX/RX clock delay (4.2.25, 4.2.26). These are indirectly
> addressed, see at803x_config_init().

My dump code:

void mydump(struct phy_device *phydev, int *foo, int *bar)
{
	int i;
	for (i = 0; i < 32; ++i) foo[i] = phy_read(phydev, i);
	for (i = 0; i < 20; ++i) {
		phy_write(phydev, 0x1d, i);
		mdelay(1);
		bar[i] = phy_read(phydev, 0x1e);
	}
}

[    0.738528] IDX=0x01 796d != 7949
[    0.741860] IDX=0x05 c1e1 != 0000
[    0.745191] IDX=0x06 000f != 0004
[    0.748521] IDX=0x0a 3800 != 0000
[    0.751851] IDX=0x11 bc10 != 0012
[    0.755182] IDX=0x13 7400 != 0000
[    0.758513] IDX=0x1b 060e != 0600
[    0.761842] DEBUG REGS
[    0.764211] IDX=0x01 ffd0 != 0032
[    0.767542] IDX=0x02 3f0f != 3110
[    0.770872] IDX=0x03 3fff != 3f00
[    0.774203] IDX=0x0c 0800 != 1801
[    0.777533] IDX=0x0d 0100 != 0000
[    0.780863] IDX=0x0e 0023 != 0040

Differences in debug registers only occur in undocumented registers.
(Only 0x00, 0x05, 0x10, 0x11, 0x12 are documented.)

Regards.