From: Jan Kiszka <jan.kiszka@web.de>
To: Maxime Ripard <maxime.ripard@free-electrons.com>,
Gilles Chanteperdrix <gilles.chanteperdrix@xenomai.org>,
GP Orcullo <kinsamanka@gmail.com>
Cc: "xenomai@xenomai.org" <xenomai@xenomai.org>
Subject: Re: [Xenomai] [PATCH] Add support for SUNXI boards
Date: Sat, 18 Apr 2015 11:34:49 +0200 [thread overview]
Message-ID: <55322539.3050800@web.de> (raw)
In-Reply-To: <20150418065647.GU15807@lukather>
On 2015-04-18 08:56, Maxime Ripard wrote:
> On Thu, Apr 16, 2015 at 06:56:00PM +0200, Gilles Chanteperdrix wrote:
>> On Thu, Apr 16, 2015 at 06:53:24PM +0200, Jan Kiszka wrote:
>>> On 2015-04-16 18:43, Gilles Chanteperdrix wrote:
>>>> On Thu, Apr 16, 2015 at 06:37:35PM +0200, Jan Kiszka wrote:
>>>>> On 2015-04-16 18:16, Gilles Chanteperdrix wrote:
>>>>>> On Fri, Apr 17, 2015 at 12:04:22AM +0800, GP Orcullo wrote:
>>>>>>> On Thu, Apr 16, 2015 at 9:19 PM, Gilles Chanteperdrix
>>>>>>> <gilles.chanteperdrix@xenomai.org> wrote:
>>>>>>>> On Thu, Apr 16, 2015 at 04:05:05PM +0800, GP Orcullo wrote:
>>>>>>>>> Tested on a Cubieboard2 with v3.16.7-ckt9 kernel.
>>>>>>>>
>>>>>>>> Does not sunxi have GPIO ?
>>>>>>>>
>>>>>>>> --
>>>>>>>> Gilles.
>>>>>>>
>>>>>>> There's no GPIO driver in the mainline kernel. The original sunxi
>>>>>>> kernel has incomplete support for GPIOs.
>>>>>>
>>>>>> Ok, what about timer and tsc? Basically, you should run through the
>>>>>> ARM porting guide and check every modification to be made. And if
>>>>>> you have done so, the commit message should mention it.
>>>>>
>>>>> sunxi is pretty generic ARMv7-class in that regard, but double-checking
>>>>> is surely better.
>>>>
>>>> armv7 does not mean a particular timer. Cortex A9 or cortex A15 do,
>>>> but different ones, and Cortex A8 does not for instance. The
>>>> processor we are talking about is probably not a cortex A9 since on
>>>> I-pipe, there is no timer or tsc defined on A9 when booting in UP
>>>> mode (and GP Orcullo is booting in UP mode). So my question is not
>>>> about "double-checking", it is rather the first check.
>>>
>>> The A20 is a dual-core Cortex A7.
>>
>> Strange that GP Orcullo is not running the kernel in SMP mode then.
>
> The A20 uses PSCI to implement its SMP ops, which requires some
> cooperation from the bootloader. Maybe he just has a too ancient
> bootloader.
Recent upstream U-boot is a must, of course. I think the upstream kernel
never supported SMP without PSCI, and the now obsolete sunxi U-boot was
lacking that feature.
Jan
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next prev parent reply other threads:[~2015-04-18 9:34 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-04-16 8:05 [Xenomai] [PATCH] Add support for SUNXI boards GP Orcullo
2015-04-16 13:19 ` Gilles Chanteperdrix
2015-04-16 16:04 ` GP Orcullo
2015-04-16 16:16 ` Gilles Chanteperdrix
2015-04-16 16:37 ` Jan Kiszka
2015-04-16 16:43 ` Gilles Chanteperdrix
2015-04-16 16:53 ` Jan Kiszka
2015-04-16 16:56 ` Gilles Chanteperdrix
2015-04-18 6:56 ` Maxime Ripard
2015-04-18 9:34 ` Jan Kiszka [this message]
2015-04-18 11:50 ` Maxime Ripard
2015-04-16 22:29 ` GP Orcullo
2015-04-16 23:13 ` Gilles Chanteperdrix
2015-04-18 6:55 ` Maxime Ripard
2015-04-18 8:05 ` GP Orcullo
2015-04-18 8:16 ` Maxime Ripard
2015-04-18 14:45 ` GP Orcullo
2015-04-18 15:20 ` Gilles Chanteperdrix
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