From: York Sun <yorksun@freescale.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 1/4] drivers/ddr/fsl: Update DDR driver for DDR4
Date: Thu, 23 Apr 2015 16:38:31 -0700 [thread overview]
Message-ID: <55398277.9060306@freescale.com> (raw)
In-Reply-To: <1426782629-26149-1-git-send-email-yorksun@freescale.com>
On 03/19/2015 09:30 AM, York Sun wrote:
> Add/update registers for DDR4, including DQ mappings. Allow raw timing
> method used for all controllers. Update mode_9 register to 0x500 for
> improved stability. Check DDR controller version number individually
> in case a SoC has multiple DDR controllers of different versions.
> Increase read-write turnaround for DDR4 high speeds.
>
> Signed-off-by: York Sun <yorksun@freescale.com>
> ---
This set is applied to fsl-qoriq master, awaiting upstream.
[U-Boot,1/4] drivers/ddr/fsl: Update DDR driver for DDR4
[U-Boot,2/4] driver/ddr/fsl: Fix driver to support empty first slot
[U-Boot,3/4] driver/ddr/fsl: Add built-in memory test for DDR4 driver
[U-Boot,4/4] driver/ddr/fsl: Add workaround for DDR erratum A008511
York
prev parent reply other threads:[~2015-04-23 23:38 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-03-19 16:30 [U-Boot] [PATCH 1/4] drivers/ddr/fsl: Update DDR driver for DDR4 York Sun
2015-03-19 16:30 ` [U-Boot] [PATCH 2/4] driver/ddr/fsl: Fix driver to support empty first slot York Sun
2015-03-19 16:30 ` [U-Boot] [PATCH 3/4] driver/ddr/fsl: Add built-in memory test for DDR4 driver York Sun
2015-03-19 16:30 ` [U-Boot] [PATCH 4/4] driver/ddr/fsl: Add workaround for DDR erratum A008511 York Sun
2015-04-23 23:38 ` York Sun [this message]
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