From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andrew Cooper Subject: Re: [v3 01/10] vmx: add new boot parameter to control PML enabling Date: Fri, 24 Apr 2015 11:46:44 +0100 Message-ID: <553A1F14.8060201@citrix.com> References: <1429863578-16741-1-git-send-email-kai.huang@linux.intel.com> <1429863578-16741-2-git-send-email-kai.huang@linux.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1429863578-16741-2-git-send-email-kai.huang@linux.intel.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Kai Huang , tim@xen.org, jbeulich@suse.com, kevin.tian@intel.com, xen-devel@lists.xen.org List-Id: xen-devel@lists.xenproject.org On 24/04/15 09:19, Kai Huang wrote: > A top level EPT parameter "ept=" and a sub boolean "opt_pml_enabled" > are added to control PML. Other booleans can be further added for any other EPT > related features. > > The document description for the new parameter is also added. > > Signed-off-by: Kai Huang Reviewed-by: Andrew Cooper > --- > docs/misc/xen-command-line.markdown | 15 +++++++++++++++ > xen/arch/x86/hvm/vmx/vmcs.c | 30 ++++++++++++++++++++++++++++++ > 2 files changed, 45 insertions(+) > > diff --git a/docs/misc/xen-command-line.markdown b/docs/misc/xen-command-line.markdown > index 1dda1f0..4889e27 100644 > --- a/docs/misc/xen-command-line.markdown > +++ b/docs/misc/xen-command-line.markdown > @@ -685,6 +685,21 @@ requirement can be relaxed. This option is particularly useful for nested > virtualization, to allow the L1 hypervisor to use EPT even if the L0 hypervisor > does not provide VM\_ENTRY\_LOAD\_GUEST\_PAT. > > +### ept (Intel) > +> `= List of ( pml )` > + > +> Default: `false` > + > +Controls EPT related features. Currently only Page Modification Logging (PML) is > +the controllable feature as boolean type. > + > +PML is a new hardware feature in Intel's Broadwell Server and further platforms > +which reduces hypervisor overhead of log-dirty mechanism by automatically > +recording GPAs (guest physical addresses) when guest memory gets dirty, and > +therefore significantly reducing number of EPT violation caused by write > +protection of guest memory, which is a necessity to implement log-dirty > +mechanism before PML. > + > ### gdb > > `= [/][,DPS[,[,[,[,]]]] | pci | amt ] ` > > diff --git a/xen/arch/x86/hvm/vmx/vmcs.c b/xen/arch/x86/hvm/vmx/vmcs.c > index 63007a9..79efa42 100644 > --- a/xen/arch/x86/hvm/vmx/vmcs.c > +++ b/xen/arch/x86/hvm/vmx/vmcs.c > @@ -64,6 +64,36 @@ integer_param("ple_gap", ple_gap); > static unsigned int __read_mostly ple_window = 4096; > integer_param("ple_window", ple_window); > > +static bool_t __read_mostly opt_pml_enabled = 0; > + > +/* > + * The 'ept' parameter controls functionalities that depend on, or impact the > + * EPT mechanism. Optional comma separated value may contain: > + * > + * pml Enable PML > + */ > +static void __init parse_ept_param(char *s) > +{ > + char *ss; > + > + do { > + bool_t val = !!strncmp(s, "no-", 3); > + if ( !val ) > + s += 3; > + > + ss = strchr(s, ','); > + if ( ss ) > + *ss = '\0'; > + > + if ( !strcmp(s, "pml") ) > + opt_pml_enabled = val; > + > + s = ss + 1; > + } while ( ss ); > +} > + > +custom_param("ept", parse_ept_param); > + > /* Dynamic (run-time adjusted) execution control flags. */ > u32 vmx_pin_based_exec_control __read_mostly; > u32 vmx_cpu_based_exec_control __read_mostly;