From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40012) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YnTy6-0007bR-Ld for qemu-devel@nongnu.org; Wed, 29 Apr 2015 11:32:15 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YnTy1-0007dL-WF for qemu-devel@nongnu.org; Wed, 29 Apr 2015 11:32:10 -0400 Received: from mailapp01.imgtec.com ([195.59.15.196]:61252) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YnTy1-0007dD-Rb for qemu-devel@nongnu.org; Wed, 29 Apr 2015 11:32:05 -0400 Message-ID: <5540F96E.8090109@imgtec.com> Date: Wed, 29 Apr 2015 16:31:58 +0100 From: Leon Alrae MIME-Version: 1.0 References: <1430224874-18513-1-git-send-email-leon.alrae@imgtec.com> <1430224874-18513-3-git-send-email-leon.alrae@imgtec.com> <553F8C8E.2030706@imgtec.com> <553FAE58.9010609@imgtec.com> <20150428213908.GC22974@jhogan-linux.le.imgtec.org> In-Reply-To: <20150428213908.GC22974@jhogan-linux.le.imgtec.org> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH 2/7] target-mips: support Page Frame Number Extension field List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: James Hogan Cc: qemu-devel@nongnu.org, aurelien@aurel32.net > I think I wasn't expecting that because 32-bit kernels can run on MIPS64 > hardware using the same mfc0/mfhc0 instructions, so having a single > internal representation in QEMU seemed simpler & less fragile, since the > same source code needs to support both MIPS32 and MIPS64 anyway. In my opinion implementing MIPS32 details in a different way than specified in MIPS32 PRA would be actually more fragile. That could cause just more confusion when implementing future MIPS32 PRA changes affecting this area. Leon