Re: [PATCH v3 2/3] xen/arm: Add p2m_ipa_bits

[Julien Grall <julien.grall@citrix.com>]

Hi Edgar,

On 30/04/15 12:55, Edgar E. Iglesias wrote:
> From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
> 
> Export p2m_ipa_bits holding the bit size of IPA addresses used

NIT: I think "addresses" is redundant here. IPA always has the word
"address" in it

> in p2m tables.
> 
> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
> ---
>  xen/arch/arm/p2m.c        | 5 +++++
>  xen/include/asm-arm/p2m.h | 3 +++
>  2 files changed, 8 insertions(+)
> 
> diff --git a/xen/arch/arm/p2m.c b/xen/arch/arm/p2m.c
> index 8dfee24..377e5e6 100644
> --- a/xen/arch/arm/p2m.c
> +++ b/xen/arch/arm/p2m.c
> @@ -27,6 +27,9 @@ static unsigned int __read_mostly p2m_root_level;
>  
>  #define P2M_ROOT_PAGES    (1<<P2M_ROOT_ORDER)
>  
> +/* Size of IPA addresses in bits.  */

Ditto.

> +unsigned int p2m_ipa_bits;
> +
>  static bool_t p2m_valid(lpae_t pte)
>  {
>      return pte.p2m.valid;
> @@ -1515,6 +1518,7 @@ void __init setup_virt_paging(void)
>  
>  #ifdef CONFIG_ARM_32
>      printk("P2M: 40-bit IPA\n");
> +    p2m_ipa_bits = 40;
>      val |= VTCR_T0SZ(0x18); /* 40 bit IPA */
>      val |= VTCR_SL0(0x1); /* P2M starts at first level */
>  #else /* CONFIG_ARM_64 */
> @@ -1557,6 +1561,7 @@ void __init setup_virt_paging(void)
>  
>      p2m_root_order = pa_range_info[pa_range].root_order;
>      p2m_root_level = 2 - pa_range_info[pa_range].sl0;
> +    p2m_ipa_bits = 64 - pa_range_info[pa_range].t0sz;
>  
>      printk("P2M: %d-bit IPA with %d-bit PA\n",
>             64 - pa_range_info[pa_range].t0sz,
> diff --git a/xen/include/asm-arm/p2m.h b/xen/include/asm-arm/p2m.h
> index 341df55..0c808f4 100644
> --- a/xen/include/asm-arm/p2m.h
> +++ b/xen/include/asm-arm/p2m.h
> @@ -10,6 +10,9 @@
>  
>  #define paddr_bits PADDR_BITS
>  
> +/* Holds the bitsize of IPA addresses in p2m tables.  */

Same here.

s/bitsize/bit size/?

With thoses changes:

Reviewed-by: Julien Grall <julien.grall@citrix.com>

Regards,

-- 
Julien Grall