Re: [PATCH 2/3] xen/vt-d: mask interrupt message generation

["Chen, Tiejun" <tiejun.chen@intel.com>]

On 2015/5/4 16:57, Jan Beulich wrote:
>>>> On 04.05.15 at 07:08, <tiejun.chen@intel.com> wrote:
>> At first I doubted this is issued by some improper cache behaviors.
>> Because as you see, "root_entry[0] = 80f5001" indicates we already set
>> that present bit. But Caching Mode bit is zero in BDW so this means
>> remapping hardware doesn't own contest cache. And I also check xen
>> always calls clflush to write back memory on CPU side. (Even I also
>> tried to use wbinvd to replace clflush). And plus, you can see this
>> guest fault address is a weird zero, so I turned to concern if this is
>> just an unexpected fault which is pending because of some BIOS cleanup,
>> or undefined hardware behaviors. Here I mean clear_fault_bits() is
>> already not enough to clear this kind of pending interrupt before we
>> complete all VT-D initializations.
>
> This last aspect in particular needs more explanation, but I'm
> wary of the change in general (see Yang's response).
>

Sure.

As we discussed offline, Yang though at most this is a way to workaround 
our problem. So I would ping BIOS team to double check if this is an 
issue specific to some given BIOSs or platforms since this doesn't meet 
the current specification

Thanks
Tiejun