From mboxrd@z Thu Jan 1 00:00:00 1970 From: Julien Grall Subject: Re: [PATCH v4 3/3] xen/iommu: arm: Use p2m_ipa_bits as stage2 input size Date: Tue, 5 May 2015 15:30:10 +0100 Message-ID: <5548D3F2.2030302@citrix.com> References: <1430444419-11564-1-git-send-email-edgar.iglesias@gmail.com> <1430444419-11564-4-git-send-email-edgar.iglesias@gmail.com> <1430832263.2660.94.camel@citrix.com> <5548CA40.5060107@citrix.com> <1430834342.2660.104.camel@citrix.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1430834342.2660.104.camel@citrix.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Ian Campbell , Julien Grall Cc: edgar.iglesias@xilinx.com, "Edgar E. Iglesias" , tim@xen.org, stefano.stabellini@citrix.com, xen-devel@lists.xen.org List-Id: xen-devel@lists.xenproject.org On 05/05/15 14:59, Ian Campbell wrote: > On Tue, 2015-05-05 at 14:48 +0100, Julien Grall wrote: >>> Do we need to also check that we are configuring the same number of >>> levels of PT etc, or is that already handled? >> >> The SMMU only care about the number of IPA bits. > > What ensures that the starting level of the SMMU matches the starting > level of the MMU-s2? Nothing, it's hardcoded in the SMMU driver for now :/. It's assuming SL0 = 1 which works fine for ARM32 but would be an issue on platform with IPA >= 44 bits. S2 output size may need to be restrict too depending of the PA bits. Regards, -- Julien Grall