From: York Sun <yorksun@freescale.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v3] T2080QDS/PCIe: Soft Reset PCIe on T2080QDS for down-training issue
Date: Tue, 5 May 2015 09:30:19 -0700 [thread overview]
Message-ID: <5548F01B.3090403@freescale.com> (raw)
In-Reply-To: <1427357589-42350-1-git-send-email-B45475@freescale.com>
On 03/26/2015 01:13 AM, Zhao Qiang wrote:
> T2080QDS PEX1/Slot#1 will down-train from x4 to x2,
> with SRDS_PRTCL_S1 = 0x66 and SRDS_PRTCL_S2 = 0x15.
> Soft reset PCIe can fix this issue.
>
> Signed-off-by: Zhao Qiang <B45475@freescale.com>
> ---
> changes for v2
> - modify the commit message
> changes for v3
> - use CONFIG_FSL_PCIE_RESET instead of CONFIG_FSL_PCIE_T2080QDS_RESET
>
Applied to u-boot-mpc85xx master. Awaiting upstream.
York
prev parent reply other threads:[~2015-05-05 16:30 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-03-26 8:13 [U-Boot] [PATCH v3] T2080QDS/PCIe: Soft Reset PCIe on T2080QDS for down-training issue Zhao Qiang
2015-05-05 16:30 ` York Sun [this message]
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