diff for duplicates of <5548F965.9070302@dawncrow.de> diff --git a/a/1.txt b/N1/1.txt index b049897..cdabb2f 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,13 +1,13 @@ Am 05.05.2015 um 12:51 schrieb Will Deacon: -> On Sun, May 03, 2015 at 05:24:18PM +0100, André Hentschel wrote: ->> From: André Hentschel <nerv@dawncrow.de> +> On Sun, May 03, 2015 at 05:24:18PM +0100, Andr? Hentschel wrote: +>> From: Andr? Hentschel <nerv@dawncrow.de> >> >> Since commit a4780adeefd042482f624f5e0d577bf9cdcbb760 the user writeable TLS >> register on ARM is preserved per thread. >> >> This patch does it analogous to the ARM patch, but for compat mode on ARM64. >> ->> Signed-off-by: André Hentschel <nerv@dawncrow.de> +>> Signed-off-by: Andr? Hentschel <nerv@dawncrow.de> >> Cc: Will Deacon <will.deacon@arm.com> >> Cc: Jonathan Austin <jonathan.austin@arm.com> >> @@ -19,7 +19,7 @@ Am 05.05.2015 um 12:51 schrieb Will Deacon: > anybody actually using that? Yes, Windows ARM binaries are the well known use case, but also the compat mode should do -what the arm kernel is doing I’d think and the code wasn't adjusted yet. +what the arm kernel is doing I?d think and the code wasn't adjusted yet. What i'm curious about is why the main TLS register on arm64 is the user writeable, I'm not an security expert but this looks odd. I could easily provoke a crash by writing diff --git a/a/content_digest b/N1/content_digest index b5c722a..7789511 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,29 +1,21 @@ "ref\055464BB2.7030401@dawncrow.de\0" "ref\020150505105111.GB1550@arm.com\0" - "From\0Andr\303\251 Hentschel <nerv@dawncrow.de>\0" - "Subject\0Re: [PATCH] arm64: Preserve the user r/w register tpidr_el0 on context switch and fork in compat mode\0" + "From\0nerv@dawncrow.de (Andr\303\251 Hentschel)\0" + "Subject\0[PATCH] arm64: Preserve the user r/w register tpidr_el0 on context switch and fork in compat mode\0" "Date\0Tue, 05 May 2015 19:09:57 +0200\0" - "To\0Will Deacon <will.deacon@arm.com>\0" - "Cc\0linux-arch@vger.kernel.org <linux-arch@vger.kernel.org>" - Russell King - ARM Linux <linux@arm.linux.org.uk> - linux-arm-kernel@lists.infradead.org <linux-arm-kernel@lists.infradead.org> - linux-kernel@vger.kernel.org <linux-kernel@vger.kernel.org> - gregkh@linuxfoundation.org <gregkh@linuxfoundation.org> - Jonathan Austin <Jonathan.Austin@arm.com> - Nathan Lynch <nathan_lynch@mentor.com> - " Catalin Marinas <catalin.marinas@arm.com>\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "Am 05.05.2015 um 12:51 schrieb Will Deacon:\n" - "> On Sun, May 03, 2015 at 05:24:18PM +0100, Andr\303\251 Hentschel wrote:\n" - ">> From: Andr\303\251 Hentschel <nerv@dawncrow.de>\n" + "> On Sun, May 03, 2015 at 05:24:18PM +0100, Andr? Hentschel wrote:\n" + ">> From: Andr? Hentschel <nerv@dawncrow.de>\n" ">>\n" ">> Since commit a4780adeefd042482f624f5e0d577bf9cdcbb760 the user writeable TLS\n" ">> register on ARM is preserved per thread.\n" ">>\n" ">> This patch does it analogous to the ARM patch, but for compat mode on ARM64.\n" ">>\n" - ">> Signed-off-by: Andr\303\251 Hentschel <nerv@dawncrow.de>\n" + ">> Signed-off-by: Andr? Hentschel <nerv@dawncrow.de>\n" ">> Cc: Will Deacon <will.deacon@arm.com>\n" ">> Cc: Jonathan Austin <jonathan.austin@arm.com> \n" ">>\n" @@ -35,7 +27,7 @@ "> anybody actually using that?\n" "\n" "Yes, Windows ARM binaries are the well known use case, but also the compat mode should do\n" - "what the arm kernel is doing I\342\200\231d think and the code wasn't adjusted yet.\n" + "what the arm kernel is doing I?d think and the code wasn't adjusted yet.\n" "\n" "What i'm curious about is why the main TLS register on arm64 is the user writeable,\n" "I'm not an security expert but this looks odd. I could easily provoke a crash by writing\n" @@ -43,4 +35,4 @@ "\n" CCing Catalin Marinas -347771d241f2d7b387587887c7a3d7262fcd6c783588029aa890682cf592e8df +6a6f1cb3e45ae4d9a1d797ef85ed6d60e014f09aeda7bf373d64da6715bb63d5
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