Re: [PATCH 3/3] drm/i915/bxt: Add WaForceContextSaveRestoreNonCoherent

From: Nick Hoath <nicholas.hoath@intel.com>
To: "Deak, Imre" <imre.deak@intel.com>
Cc: "intel-gfx@lists.freedesktop.org" <intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH 3/3] drm/i915/bxt: Add WaForceContextSaveRestoreNonCoherent
Date: Wed, 06 May 2015 17:01:17 +0100	[thread overview]
Message-ID: <554A3ACD.9090402@intel.com> (raw)
In-Reply-To: <1430312524.1811.8.camel@intel.com>

On 29/04/2015 14:02, Deak, Imre wrote:
> On pe, 2015-04-10 at 13:12 +0100, Nick Hoath wrote:
>> Signed-off-by: Nick Hoath <nicholas.hoath@intel.com>
>> ---
>>   drivers/gpu/drm/i915/intel_ringbuffer.c | 5 +++++
>>   1 file changed, 5 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
>> index eebee73..cc62e5c 100644
>> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
>> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
>> @@ -1054,6 +1054,10 @@ static int bxt_init_workarounds(struct intel_engine_cs *ring)
>>   			GEN7_SBE_SS_CACHE_DISPATCH_PORT_SHARING_DISABLE);
>>   	}
>>
>> +	/* WaForceContextSaveRestoreNonCoherent:bxt */
>> +	WA_SET_BIT_MASKED(HDC_CHICKEN0,
>> +			  HDC_FORCE_CONTEXT_SAVE_RESTORE_NON_COHERENT);
>> +
>
> Looks ok, but again it needs to be added for SKL (all steppings) in
> gen9_init_workarounds.

The same argument as for patch 2/3 applies?

>
>>   	return 0;
>>   }
>>
>
>

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