From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by yocto-www.yoctoproject.org (Postfix, from userid 118) id E2600E00997; Mon, 11 May 2015 07:15:52 -0700 (PDT) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on yocto-www.yoctoproject.org X-Spam-Level: X-Spam-Status: No, score=-2.7 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, FREEMAIL_FROM, RCVD_IN_DNSWL_LOW autolearn=ham version=3.3.1 X-Spam-HAM-Report: * -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low * trust * [193.201.172.118 listed in list.dnswl.org] * 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider * (picmaster[at]mail.bg) * -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% * [score: 0.0000] * -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's * domain * 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily * valid * -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature Received: from mx2.mail.bg (mx2.mail.bg [193.201.172.118]) by yocto-www.yoctoproject.org (Postfix) with ESMTP id 497E8E00961 for ; Mon, 11 May 2015 07:15:47 -0700 (PDT) Received: from [192.168.0.62] (unknown [93.152.143.60]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mx2.mail.bg (Postfix) with ESMTPSA id 7B2216000918; Mon, 11 May 2015 17:15:46 +0300 (EEST) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=mail.bg; s=default; t=1431353746; bh=OKVDJnPuuXGV1ldyPQ2sD53OeG+SgaSxYMFRjz9wrUo=; h=Message-ID:Date:From:MIME-Version:To:CC:Subject:References: In-Reply-To:Content-Type:Content-Transfer-Encoding; b=oDGzbC2xNT31bye2+XPpyUyns+ezIPZywqcc8+0NknT+3Wgkz8Exku3nRPNqOGdvM JsL/u/O8IiUJZT+SmWi+PL+wt5r6eEZ7rMorsxDAByntL3gIpx+CErSPSxcEG8B+DC Ix2X8Dfac9WLMJ5gk+VRmE7kXTGEzNO3ZIbWZa1k= Message-ID: <5550B992.4050403@mail.bg> Date: Mon, 11 May 2015 17:15:46 +0300 From: Nikolay Dimitrov User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Icedove/31.6.0 MIME-Version: 1.0 To: Gary Thomas References: <5550AA0B.9080908@mail.bg> <5550ABED.5030204@mlbassoc.com> In-Reply-To: <5550ABED.5030204@mlbassoc.com> Cc: meta-freescale@yoctoproject.org Subject: Re: Kernel 3.10.53 can't set ENET_REF_CLK to 50 MHz X-BeenThere: meta-freescale@yoctoproject.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Usage and development list for the meta-fsl-* layers List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 11 May 2015 14:15:53 -0000 Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit Hi Gary, On 05/11/2015 04:17 PM, Gary Thomas wrote: > On 2015-05-11 07:09, Nikolay Dimitrov wrote: >> Hi gang, >> >> While porting kernel 3.10.53 to an imx6d-based board, I stumbled upon >> the following issue - my board has a 100 MBit/s RMII PHY which needs 50 >> MHz reference clock from the SOC, but during the kernel initialization >> the clock is configured as 125 MHz (observed with a oscilloscope on a >> test pad). The reference clock is sent from pin GPIO_16 to the PHY. >> >> I assume there's no hardware issue with the board, as the old kernel >> 3.10.17 works fine on the same board. Also U-Boot successfully >> downloads the 3.10.53 kernel via network, just before observing the >> fore-mentioned issue. >> >> Here are the relevant parts of my DT: >> >> >> &fec { >> pinctrl-names = "default"; >> pinctrl-0 = <&pinctrl_enet_4>; >> phy-mode = "rmii"; >> phy-reset-gpios = <&gpio4 5 0>; >> phy-reset-duration = <1>; >> status = "okay"; >> }; >> >> &iomuxc { >> pinctrl-names = "default"; >> pinctrl-0 = <&pinctrl_hog_1>; >> >> enet { >> pinctrl_enet_4: enetgrp-4 { >> fsl,pins = < >> MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 >> MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 >> MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 >> MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0 >> MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0 >> MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0 >> MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0 >> MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0 >> MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x1b0b0 >> MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0 >> >; >> }; >> }; >> }; >> >> >> Here's a bootlog extract that shows the FEC-related messages: >> >> >> ... >> libphy: fec_enet_mii_bus: probed >> fec 2188000.ethernet eth0: registered PHC device 0 >> ... >> fec 2188000.ethernet eth0: Freescale FEC PHY driver [SMSC >> LAN8710/LAN8720] (mii_bus:phy_addr=2188000.ethernet:01, irq >> =-1) >> IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready >> Waiting up to 110 more seconds for network. >> ... >> >> >> In general, I'm looking at the appropriate way to set the >> CCM_ANALOG_PLL_ENET.DIV_SELECT to 50 MHz. >> >> Thanks in advance for your comments. Regards, >> Nikolay > > Here's how I solved this - I added a "ref-clock" property to > my fec node and set it to 50MHz. That nailed it, thanks a lot! Regards, Nikolay