diff for duplicates of <555226DD.6050508@free.fr> diff --git a/a/1.txt b/N1/1.txt index ceb0b01..514810e 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -55,3 +55,18 @@ I plan to set up a github repo in order to share my progress while I try to mainline the port. Regards. + +-------------- next part -------------- +A non-text attachment was scrubbed... +Name: clock-tangox.c +Type: text/x-csrc +Size: 4167 bytes +Desc: not available +URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20150512/a4eee71b/attachment-0002.bin> +-------------- next part -------------- +A non-text attachment was scrubbed... +Name: cpufreq.c +Type: text/x-csrc +Size: 1906 bytes +Desc: not available +URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20150512/a4eee71b/attachment-0003.bin> diff --git a/a/2.hdr b/a/2.hdr deleted file mode 100644 index d39814e..0000000 --- a/a/2.hdr +++ /dev/null @@ -1,5 +0,0 @@ -Content-Type: text/x-csrc; - name="clock-tangox.c" -Content-Transfer-Encoding: 7bit -Content-Disposition: attachment; - filename="clock-tangox.c" diff --git a/a/2.txt b/a/2.txt deleted file mode 100644 index 32805c3..0000000 --- a/a/2.txt +++ /dev/null @@ -1,129 +0,0 @@ -#include <linux/clocksource.h> /* clocksource_register_khz */ -#include <linux/sched_clock.h> /* sched_clock_register */ -#include <linux/clk-provider.h> /* clk_register_fixed_rate */ -#include <linux/clkdev.h> /* clk_register_clkdev */ -#include <linux/delay.h> /* register_current_timer_delay */ -#include <asm/smp_twd.h> /* twd_local_timer_register */ -#include <asm/smp_scu.h> /* scu_a9_get_base */ - -#define FAST_RAMP 1 -#define XTAL_FREQ 27000000 /* in Hz */ -#define CLKGEN_BASE 0x10000 -#define SYS_clkgen0_pll (clkgen_base + 0x00) -#define SYS_cpuclk_div_ctrl (clkgen_base + 0x24) -#define SYS_xtal_in_cnt (clkgen_base + 0x48) - -static void __iomem *clkgen_base; - -static unsigned long read_xtal_counter(void) -{ - return readl_relaxed(SYS_xtal_in_cnt); -} - -static u64 read_sched_clock(void) -{ - return read_xtal_counter(); -} - -static cycle_t read_clocksource(struct clocksource *cs) -{ - return read_xtal_counter(); -} - -static struct clocksource tangox_xtal = { - .name = "tangox_xtal", - .rating = 300, - .read = read_clocksource, - .mask = CLOCKSOURCE_MASK(32), - .flags = CLOCK_SOURCE_IS_CONTINUOUS, -}; - -static struct delay_timer delay_timer = { read_xtal_counter, XTAL_FREQ }; - -#define pi_alert(format, ...) do { \ - static char fmt[] __initdata = KERN_ALERT format; \ - printk(fmt, ## __VA_ARGS__); \ -} while (0) - -static int __init wrap_local_timer_register(void) -{ - unsigned long twd_base = scu_a9_get_base() + 0x600; - struct twd_local_timer tangox_twd = {{ - DEFINE_RES_MEM(twd_base, 16), DEFINE_RES_IRQ(29) - }}; - return twd_local_timer_register(&tangox_twd); -} - -#define REG(name, ...) union name { struct { u32 __VA_ARGS__; }; u32 val; } - -REG(SYS_clkgen_pll, N:7, :6, K:3, M:3, :5, Isel:3, :3, T:1, B:1); -/* - * CG0, CG1, CG2, CG3 PLL Control: - * ------------------------------- - * - * | Byte 3 | Byte 2 | Byte 1 | Byte 0 | - * |3 3 2 2 2 2 2 2|2 2 2 2 1 1 1 1|1 1 1 1 1 1 | | - * |1 0 9 8 7 6 5 4|3 2 1 0 9 8 7 6|5 4 3 2 1 0 9 8|7 6 5 4 3 2 1 0| - * |-|-|-----|-----|---------|-----|-----|---------|-|-------------| - * |B|T|xxxxx|Isel |xxxxxxxxx| M | K |xxxxxxxxx|x| N | - * |-|-|-----|-----|---------|-----|-----|---------|-|-------------| - * - * These registers are used to configure the PLL parameters: - * - * Bits 6 to 0: N[6:0]. Default = 29 - * Bits 15 to 13: K[2:0]. Default = 1 - * Bit 18 to 16: M[2:0]. Default = 0 - * Bits 26 to 24: Isel[2:0] (PLL Input Select). Default = 1 - * Bits 30 : T (PLL Test). Default = 0 - * Bits 31 : B (PLL Bypass). Default = 0 - * - * PLL0 : Out = In * (N+1) / (M+1) / 2^K - * PLL1 : Same as PLL0 - * PLL2 : Same as PLL0 - * Default values : All PLLs configured to output 405MHz. - */ -static void __init tangox_clock_tree_register(void) -{ - struct clk *clk; - unsigned int mul, div; - union SYS_clkgen_pll pll; - - pll.val = readl_relaxed(SYS_clkgen0_pll); - mul = pll.N + 1; div = (pll.M + 1) << pll.K; - if (pll.Isel != 1) pi_alert("PLL0 source is not XTAL_IN!\n"); - - clk = clk_register_fixed_rate(0, "XTAL", 0, CLK_IS_ROOT, XTAL_FREQ); - if (!clk) pi_alert("Failed to register %s clk!\n", "XTAL"); - - clk = clk_register_fixed_factor(0, "PLL0", "XTAL", 0, mul, div); - if (!clk) pi_alert("Failed to register %s clk!\n", "PLL0"); - - clk = clk_register_divider(0, "CPU_CLK", "PLL0", 0, SYS_cpuclk_div_ctrl, 8, 8, CLK_DIVIDER_ONE_BASED, 0); - if (!clk) pi_alert("Failed to register %s clk!\n", "CPU_CLK"); - clk_register_clkdev(clk, NULL, "cpu_clk"); - - clk = clk_register_fixed_factor(0, "PERIPHCLK", "CPU_CLK", 0, 1, 2); - if (!clk) pi_alert("Failed to register %s clk!\n", "PERIPHCLK"); - clk_register_clkdev(clk, NULL, "smp_twd"); - - writel_relaxed(FAST_RAMP << 21 | 1 << 8, SYS_cpuclk_div_ctrl); -} - -void __init tangox_timer_init(void) -{ - int err; - - clkgen_base = ioremap(CLKGEN_BASE, 0x100); - if (clkgen_base == NULL) return; - - register_current_timer_delay(&delay_timer); - sched_clock_register(read_sched_clock, 32, XTAL_FREQ); - - err = clocksource_register_hz(&tangox_xtal, XTAL_FREQ); - if (err) pi_alert("Failed to register tangox_xtal clocksource!\n"); - - tangox_clock_tree_register(); - - err = wrap_local_timer_register(); - if (err) pi_alert("Failed to register local timer!\n"); -} diff --git a/a/3.hdr b/a/3.hdr deleted file mode 100644 index 277eaf1..0000000 --- a/a/3.hdr +++ /dev/null @@ -1,5 +0,0 @@ -Content-Type: text/x-csrc; - name="cpufreq.c" -Content-Transfer-Encoding: 7bit -Content-Disposition: attachment; - filename="cpufreq.c" diff --git a/a/3.txt b/a/3.txt deleted file mode 100644 index 5f854c0..0000000 --- a/a/3.txt +++ /dev/null @@ -1,70 +0,0 @@ -/* - * Copyright 2015 Sigma Designs - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#include <linux/module.h> -#include <linux/cpufreq.h> - -MODULE_LICENSE("GPL"); -MODULE_AUTHOR("Sigma Designs"); -MODULE_DESCRIPTION("cpufreq driver for Tangox"); - -static struct cpufreq_frequency_table freq_table[] = { - { .driver_data = 1 }, - { .driver_data = 2 }, - { .driver_data = 3 }, - { .driver_data = 5 }, - { .driver_data = 9 }, - { .driver_data = 54 }, - { .frequency = CPUFREQ_TABLE_END } -}; - -static int tangox_target(struct cpufreq_policy *policy, unsigned int idx) -{ - // TODO: MUST CHECK FOR IDLE BEFORE CALLING clk_set_rate() - return clk_set_rate(policy->clk, freq_table[idx].frequency * 1000); -} - -#define FAST_RAMP_SPEED 15 /* in kHz per nanosecond */ - -static int tangox_cpu_init(struct cpufreq_policy *policy) -{ - struct cpufreq_frequency_table *p; - unsigned int freq, transition_latency; - - policy->clk = clk_get_sys("cpu_clk", NULL); - freq = clk_get_rate(policy->clk) / 1000; - transition_latency = freq / FAST_RAMP_SPEED; - - for (p = freq_table; p->frequency != CPUFREQ_TABLE_END; ++p) { - p->frequency = freq / p->driver_data; - } - - return cpufreq_generic_init(policy, freq_table, transition_latency); -} - -static struct cpufreq_driver tangox_cpufreq_driver = { - .name = "tangox-cpufreq", - .init = tangox_cpu_init, - .verify = cpufreq_generic_frequency_table_verify, - .target_index = tangox_target, - .get = cpufreq_generic_get, - .exit = cpufreq_generic_exit, - .attr = cpufreq_generic_attr, -}; - -static int __init tangox_cpufreq_init(void) -{ - return cpufreq_register_driver(&tangox_cpufreq_driver); -} - -static void __exit tangox_cpufreq_exit(void) -{ - cpufreq_unregister_driver(&tangox_cpufreq_driver); -} - -module_init(tangox_cpufreq_init); -module_exit(tangox_cpufreq_exit); diff --git a/a/content_digest b/N1/content_digest index 4dfeefc..fe4ae88 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -2,17 +2,11 @@ "ref\0CAKohpo=eMA6L9=jK=bAnbFuDxcdtpQNub0WFnSy6MOqB3jOdjA@mail.gmail.com\0" "ref\0555218C7.5050602@free.fr\0" "ref\020150512155004.GP2067@n2100.arm.linux.org.uk\0" - "From\0Mason <slash.tmp@free.fr>\0" - "Subject\0Re: schedule_timeout sleeps too long after dividing CPU frequency\0" + "From\0slash.tmp@free.fr (Mason)\0" + "Subject\0schedule_timeout sleeps too long after dividing CPU frequency\0" "Date\0Tue, 12 May 2015 18:14:21 +0200\0" - "To\0Russell King - ARM Linux <linux@arm.linux.org.uk>\0" - "Cc\0Viresh Kumar <viresh.kumar@linaro.org>" - Daniel Lezcano <daniel.lezcano@linaro.org> - Rafael J. Wysocki <rjw@rjwysocki.net> - cpufreq <cpufreq@vger.kernel.org> - Linux ARM <linux-arm-kernel@lists.infradead.org> - " Linux PM <linux-pm@vger.kernel.org>\0" - "\01:1\0" + "To\0linux-arm-kernel@lists.infradead.org\0" + "\00:1\0" "b\0" "On 12/05/2015 17:50, Russell King - ARM Linux wrote:\n" "> On Tue, May 12, 2015 at 05:14:15PM +0200, Mason wrote:\n" @@ -70,211 +64,21 @@ "I plan to set up a github repo in order to share my progress\n" "while I try to mainline the port.\n" "\n" - Regards. - "\01:2\0" - "fn\0clock-tangox.c\0" - "b\0" - "#include <linux/clocksource.h>\t/* clocksource_register_khz\t*/\n" - "#include <linux/sched_clock.h>\t/* sched_clock_register\t\t*/\n" - "#include <linux/clk-provider.h>\t/* clk_register_fixed_rate\t*/\n" - "#include <linux/clkdev.h>\t/* clk_register_clkdev\t\t*/\n" - "#include <linux/delay.h>\t/* register_current_timer_delay\t*/\n" - "#include <asm/smp_twd.h>\t/* twd_local_timer_register\t*/\n" - "#include <asm/smp_scu.h>\t/* scu_a9_get_base\t\t*/\n" - "\n" - "#define FAST_RAMP\t\t1\n" - "#define XTAL_FREQ\t\t27000000 /* in Hz */\n" - "#define CLKGEN_BASE\t\t0x10000\n" - "#define SYS_clkgen0_pll\t\t(clkgen_base + 0x00)\n" - "#define SYS_cpuclk_div_ctrl\t(clkgen_base + 0x24)\n" - "#define SYS_xtal_in_cnt\t\t(clkgen_base + 0x48)\n" - "\n" - "static void __iomem *clkgen_base;\n" - "\n" - "static unsigned long read_xtal_counter(void)\n" - "{\n" - "\treturn readl_relaxed(SYS_xtal_in_cnt);\n" - "}\n" - "\n" - "static u64 read_sched_clock(void)\n" - "{\n" - "\treturn read_xtal_counter();\n" - "}\n" - "\n" - "static cycle_t read_clocksource(struct clocksource *cs)\n" - "{\n" - "\treturn read_xtal_counter();\n" - "}\n" - "\n" - "static struct clocksource tangox_xtal = {\n" - "\t.name\t= \"tangox_xtal\",\n" - "\t.rating\t= 300,\n" - "\t.read\t= read_clocksource,\n" - "\t.mask\t= CLOCKSOURCE_MASK(32),\n" - "\t.flags\t= CLOCK_SOURCE_IS_CONTINUOUS,\n" - "};\n" - "\n" - "static struct delay_timer delay_timer = { read_xtal_counter, XTAL_FREQ };\n" - "\n" - "#define pi_alert(format, ...) do {\t\t\t\t\\\n" - "\tstatic char fmt[] __initdata = KERN_ALERT format;\t\\\n" - "\tprintk(fmt, ## __VA_ARGS__);\t\t\t\t\\\n" - "} while (0)\n" - "\n" - "static int __init wrap_local_timer_register(void)\n" - "{\n" - "\tunsigned long twd_base = scu_a9_get_base() + 0x600;\n" - "\tstruct twd_local_timer tangox_twd = {{\n" - "\t\tDEFINE_RES_MEM(twd_base, 16), DEFINE_RES_IRQ(29)\n" - "\t}};\n" - "\treturn twd_local_timer_register(&tangox_twd);\n" - "}\n" - "\n" - "#define REG(name, ...) union name { struct { u32 __VA_ARGS__; }; u32 val; }\n" - "\n" - "REG(SYS_clkgen_pll, N:7, :6, K:3, M:3, :5, Isel:3, :3, T:1, B:1);\n" - "/*\n" - " * CG0, CG1, CG2, CG3 PLL Control:\n" - " * -------------------------------\n" - " *\n" - " * | Byte 3 | Byte 2 | Byte 1 | Byte 0 |\n" - " * |3 3 2 2 2 2 2 2|2 2 2 2 1 1 1 1|1 1 1 1 1 1 | |\n" - " * |1 0 9 8 7 6 5 4|3 2 1 0 9 8 7 6|5 4 3 2 1 0 9 8|7 6 5 4 3 2 1 0|\n" - " * |-|-|-----|-----|---------|-----|-----|---------|-|-------------|\n" - " * |B|T|xxxxx|Isel |xxxxxxxxx| M | K |xxxxxxxxx|x| N |\n" - " * |-|-|-----|-----|---------|-----|-----|---------|-|-------------|\n" - " *\n" - " * These registers are used to configure the PLL parameters:\n" - " *\n" - " * Bits 6 to 0: N[6:0]. Default = 29\n" - " * Bits 15 to 13: K[2:0]. Default = 1\n" - " * Bit 18 to 16: M[2:0]. Default = 0\n" - " * Bits 26 to 24: Isel[2:0] (PLL Input Select). Default = 1\n" - " * Bits 30 : T (PLL Test). Default = 0\n" - " * Bits 31 : B (PLL Bypass). Default = 0\n" - " *\n" - " * PLL0 : Out = In * (N+1) / (M+1) / 2^K\n" - " * PLL1 : Same as PLL0\n" - " * PLL2 : Same as PLL0\n" - " * Default values : All PLLs configured to output 405MHz.\n" - " */\n" - "static void __init tangox_clock_tree_register(void)\n" - "{\n" - "\tstruct clk *clk;\n" - "\tunsigned int mul, div;\n" - "\tunion SYS_clkgen_pll pll;\n" - "\n" - "\tpll.val = readl_relaxed(SYS_clkgen0_pll);\n" - "\tmul = pll.N + 1; div = (pll.M + 1) << pll.K;\n" - "\tif (pll.Isel != 1) pi_alert(\"PLL0 source is not XTAL_IN!\\n\");\n" - "\n" - "\tclk = clk_register_fixed_rate(0, \"XTAL\", 0, CLK_IS_ROOT, XTAL_FREQ);\n" - "\tif (!clk) pi_alert(\"Failed to register %s clk!\\n\", \"XTAL\");\n" - "\n" - "\tclk = clk_register_fixed_factor(0, \"PLL0\", \"XTAL\", 0, mul, div);\n" - "\tif (!clk) pi_alert(\"Failed to register %s clk!\\n\", \"PLL0\");\n" - "\n" - "\tclk = clk_register_divider(0, \"CPU_CLK\", \"PLL0\", 0, SYS_cpuclk_div_ctrl, 8, 8, CLK_DIVIDER_ONE_BASED, 0);\n" - "\tif (!clk) pi_alert(\"Failed to register %s clk!\\n\", \"CPU_CLK\");\n" - "\tclk_register_clkdev(clk, NULL, \"cpu_clk\");\n" - "\n" - "\tclk = clk_register_fixed_factor(0, \"PERIPHCLK\", \"CPU_CLK\", 0, 1, 2);\n" - "\tif (!clk) pi_alert(\"Failed to register %s clk!\\n\", \"PERIPHCLK\");\n" - "\tclk_register_clkdev(clk, NULL, \"smp_twd\");\n" - "\n" - "\twritel_relaxed(FAST_RAMP << 21 | 1 << 8, SYS_cpuclk_div_ctrl);\n" - "}\n" - "\n" - "void __init tangox_timer_init(void)\n" - "{\n" - "\tint err;\n" - "\n" - "\tclkgen_base = ioremap(CLKGEN_BASE, 0x100);\n" - "\tif (clkgen_base == NULL) return;\n" - "\n" - "\tregister_current_timer_delay(&delay_timer);\n" - "\tsched_clock_register(read_sched_clock, 32, XTAL_FREQ);\n" - "\n" - "\terr = clocksource_register_hz(&tangox_xtal, XTAL_FREQ);\n" - "\tif (err) pi_alert(\"Failed to register tangox_xtal clocksource!\\n\");\n" - "\n" - "\ttangox_clock_tree_register();\n" - "\n" - "\terr = wrap_local_timer_register();\n" - "\tif (err) pi_alert(\"Failed to register local timer!\\n\");\n" - } - "\01:3\0" - "fn\0cpufreq.c\0" - "b\0" - "/*\n" - " * Copyright 2015 Sigma Designs\n" - " *\n" - " * This program is free software; you can redistribute it and/or modify\n" - " * it under the terms of the GNU General Public License version 2 as\n" - " * published by the Free Software Foundation.\n" - " */\n" - "#include <linux/module.h>\n" - "#include <linux/cpufreq.h>\n" - "\n" - "MODULE_LICENSE(\"GPL\");\n" - "MODULE_AUTHOR(\"Sigma Designs\");\n" - "MODULE_DESCRIPTION(\"cpufreq driver for Tangox\");\n" - "\n" - "static struct cpufreq_frequency_table freq_table[] = {\n" - "\t{ .driver_data = 1 },\n" - "\t{ .driver_data = 2 },\n" - "\t{ .driver_data = 3 },\n" - "\t{ .driver_data = 5 },\n" - "\t{ .driver_data = 9 },\n" - "\t{ .driver_data = 54 },\n" - "\t{ .frequency = CPUFREQ_TABLE_END }\n" - "};\n" - "\n" - "static int tangox_target(struct cpufreq_policy *policy, unsigned int idx)\n" - "{\n" - "\t// TODO: MUST CHECK FOR IDLE BEFORE CALLING clk_set_rate()\n" - "\treturn clk_set_rate(policy->clk, freq_table[idx].frequency * 1000);\n" - "}\n" - "\n" - "#define FAST_RAMP_SPEED 15 /* in kHz per nanosecond */\n" - "\n" - "static int tangox_cpu_init(struct cpufreq_policy *policy)\n" - "{\n" - "\tstruct cpufreq_frequency_table *p;\n" - "\tunsigned int freq, transition_latency;\n" - "\n" - "\tpolicy->clk = clk_get_sys(\"cpu_clk\", NULL);\n" - "\tfreq = clk_get_rate(policy->clk) / 1000;\n" - "\ttransition_latency = freq / FAST_RAMP_SPEED;\n" - "\n" - "\tfor (p = freq_table; p->frequency != CPUFREQ_TABLE_END; ++p) {\n" - "\t\tp->frequency = freq / p->driver_data;\n" - "\t}\n" - "\n" - "\treturn cpufreq_generic_init(policy, freq_table, transition_latency);\n" - "}\n" - "\n" - "static struct cpufreq_driver tangox_cpufreq_driver = {\n" - "\t.name\t\t= \"tangox-cpufreq\",\n" - "\t.init\t\t= tangox_cpu_init,\n" - "\t.verify\t\t= cpufreq_generic_frequency_table_verify,\n" - "\t.target_index\t= tangox_target,\n" - "\t.get\t\t= cpufreq_generic_get,\n" - "\t.exit\t\t= cpufreq_generic_exit,\n" - "\t.attr\t\t= cpufreq_generic_attr,\n" - "};\n" - "\n" - "static int __init tangox_cpufreq_init(void)\n" - "{\n" - "\treturn cpufreq_register_driver(&tangox_cpufreq_driver);\n" - "}\n" - "\n" - "static void __exit tangox_cpufreq_exit(void)\n" - "{\n" - "\tcpufreq_unregister_driver(&tangox_cpufreq_driver);\n" - "}\n" - "\n" - "module_init(tangox_cpufreq_init);\n" - module_exit(tangox_cpufreq_exit); + "Regards.\n" + "\n" + "-------------- next part --------------\n" + "A non-text attachment was scrubbed...\n" + "Name: clock-tangox.c\n" + "Type: text/x-csrc\n" + "Size: 4167 bytes\n" + "Desc: not available\n" + "URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20150512/a4eee71b/attachment-0002.bin>\n" + "-------------- next part --------------\n" + "A non-text attachment was scrubbed...\n" + "Name: cpufreq.c\n" + "Type: text/x-csrc\n" + "Size: 1906 bytes\n" + "Desc: not available\n" + URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20150512/a4eee71b/attachment-0003.bin> -9c1a532d693707732ddf2071483fdeccc23e6e4d62077d9998142778b29e6c68 +a1924beed9434413faa010849de26b96e92f912a5a234e0074d387fac4c57452
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