From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54178) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Ysdl2-0003fn-FU for qemu-devel@nongnu.org; Wed, 13 May 2015 17:00:01 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Ysdkz-0007CX-AU for qemu-devel@nongnu.org; Wed, 13 May 2015 17:00:00 -0400 Received: from mailapp01.imgtec.com ([195.59.15.196]:19376) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Ysdkz-0007CG-39 for qemu-devel@nongnu.org; Wed, 13 May 2015 16:59:57 -0400 Message-ID: <5553BB40.7050706@imgtec.com> Date: Wed, 13 May 2015 21:59:44 +0100 From: Leon Alrae MIME-Version: 1.0 References: <1431531457-17127-1-git-send-email-yongbok.kim@imgtec.com> <1431531457-17127-3-git-send-email-yongbok.kim@imgtec.com> <5553A5C4.6030902@twiddle.net> <5553ACF2.7050708@twiddle.net> In-Reply-To: <5553ACF2.7050708@twiddle.net> Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH v3 2/2] target-mips: Misaligned memory accesses for MSA List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Richard Henderson Cc: Yongbok Kim , peter.maydell@linaro.org, qemu-devel@nongnu.org, "Maciej W. Rozycki" , afaerber@suse.de On 13/05/15 20:58, Richard Henderson wrote: > On 05/13/2015 12:56 PM, Maciej W. Rozycki wrote: >> We must have a way to deal with memory access operations issued by a >> single machine instruction crossing a page boundary already as this is >> what MIPS16 SAVE and RESTORE instructions as well as microMIPS SWP, SDP, >> SWM, SDM, LWP, LDP, LWM and LDM ones do. Perhaps these are worth >> looking into and their approach copying (or reusing) here? > > Certainly we do. It's all in softmmu_template.h. I believe the problem is that MSA vector register's size is 16-bytes (this DATA_SIZE isn't supported in softmmu_template) and MSA load/store is supposed to be atomic. Leon