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From: Joonyoung Shim <jy0922.shim@samsung.com>
To: Stephen Boyd <sboyd@codeaurora.org>
Cc: linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
	mturquette@linaro.org, haojian.zhuang@gmail.com,
	james.hogan@imgtec.com
Subject: Re: [PATCH 1/2] clk: divider: don't set_rate with CLK_DIVIDER_READ_ONLY flag
Date: Fri, 15 May 2015 10:52:54 +0900	[thread overview]
Message-ID: <55555176.3060703@samsung.com> (raw)
In-Reply-To: <20150512235910.GC14873@codeaurora.org>

Hi Stephen,

On 05/13/2015 08:59 AM, Stephen Boyd wrote:
> On 04/07, Joonyoung Shim wrote:
>> Even if use CLK_DIVIDER_READ_ONLY flag, divider setting can be changed
>> by set_rate callback. Don't change divider setting from set_rate
>> callback of divider with CLK_DIVIDER_READ_ONLY flag.
>>
>> Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
>> ---
> 
> Is the rate actually changing? Or is it just a problem that we
> may be writing the register to the same value it already is?
> 

If rate and parant_rate are different, it can write the register to
different value. Even if the value is same but i think it's unnecessary
to re-write the register.

Thanks.

  reply	other threads:[~2015-05-15  1:52 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-04-07  7:46 [PATCH 1/2] clk: divider: don't set_rate with CLK_DIVIDER_READ_ONLY flag Joonyoung Shim
2015-04-07  7:46 ` [PATCH 2/2] clk: divider: fix to set parent rate from " Joonyoung Shim
2015-05-12 23:25   ` Michael Turquette
2015-05-12 23:25     ` Michael Turquette
2015-05-12 23:57     ` Stephen Boyd
2015-05-15  2:12       ` Joonyoung Shim
2015-06-04 22:42   ` Stephen Boyd
2015-05-12 23:59 ` [PATCH 1/2] clk: divider: don't set_rate with " Stephen Boyd
2015-05-15  1:52   ` Joonyoung Shim [this message]
2015-06-04 22:44 ` Stephen Boyd

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