From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:34822) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YuYIy-0002dW-HC for qemu-devel@nongnu.org; Mon, 18 May 2015 23:34:57 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YuYIv-0000iq-2J for qemu-devel@nongnu.org; Mon, 18 May 2015 23:34:56 -0400 Message-ID: <555AAF49.809@huawei.com> Date: Tue, 19 May 2015 11:34:33 +0800 From: Shannon Zhao MIME-Version: 1.0 References: <1425017077-18487-1-git-send-email-david@gibson.dropbear.id.au> <1425017077-18487-2-git-send-email-david@gibson.dropbear.id.au> <555AA28B.8040801@huawei.com> In-Reply-To: <555AA28B.8040801@huawei.com> Content-Type: text/plain; charset="ISO-8859-1" Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCHv2 1/3] Add specific config options for PCI-E bridges List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: David Gibson , agraf@suse.de, mst@redhat.com, pbonzini@redhat.com, peter.crosthwaite@xilinx.com Cc: "peter.maydell@linaro.org" , qemu-ppc@nongnu.org, qemu-devel@nongnu.org, Christoffer Dall Hi, On 2015/5/19 10:40, Shannon Zhao wrote: > Hi, > > I'm testing PCIe root port (ioh3420) on ARM64. Firstly I use following > simple command line to check whether it works. > > qemu-system-aarch64 -M virt -device ioh3420 > > But it fails with below log: > > qemu-system-aarch64: -device ioh3420: Device initialization failed > qemu-system-aarch64: -device ioh3420: Device 'ioh3420' could not be > initialized > I found that it fails at ioh3420_initfn when calling msi_init, while upstream qemu doesn't support msi on ARM64, so msi_init return -ENOTSUP and ioh3420_initfn fails. After I apply the following patch from Christoffer, the ioh3420 works. [PATCH v2 0/3] Add support for for GICv2m and MSIs to arm-virt But do we need to fix the failure for the current upstream qemu? > Is there something wrong with my command line? or ioh3420 can't be used > on ARM64? But from this patch and the discussions on it, it seems > ioh3420 should work on ARM64. > > Thanks, > Shannon > > On 2015/2/27 14:04, David Gibson wrote: >> The i82801b11, ioh3420 and xio3130 PCI Express devices are currently >> included in the build unconditionally. >> >> While they could theoretically appear on any target platform with PCI-E, >> they're pretty unlikely to appear on platforms that aren't Intel derived. >> >> Therefore, to avoid presenting unlikely-to-be-relevant devices to the user, >> add config options to enable these components, and enable them by default >> only on x86 and arm platforms. >> >> (Note that this patch does include these for aarch64, via its inclusion of >> arm-softmmu.mak). >> >> Signed-off-by: David Gibson >> Reviewed-by: Peter Crosthwaite >> --- >> default-configs/arm-softmmu.mak | 4 ++++ >> default-configs/i386-softmmu.mak | 3 +++ >> default-configs/x86_64-softmmu.mak | 3 +++ >> hw/pci-bridge/Makefile.objs | 5 +++-- >> 4 files changed, 13 insertions(+), 2 deletions(-) >> >> diff --git a/default-configs/arm-softmmu.mak b/default-configs/arm-softmmu.mak >> index b00c2e1..6ee9b43 100644 >> --- a/default-configs/arm-softmmu.mak >> +++ b/default-configs/arm-softmmu.mak >> @@ -91,3 +91,7 @@ CONFIG_INTEGRATOR_DEBUG=y >> CONFIG_ALLWINNER_A10_PIT=y >> CONFIG_ALLWINNER_A10_PIC=y >> CONFIG_ALLWINNER_A10=y >> + >> +CONFIG_XIO3130=y >> +CONFIG_IOH3420=y >> +CONFIG_I82801B11=y >> diff --git a/default-configs/i386-softmmu.mak b/default-configs/i386-softmmu.mak >> index bd99af9..0b8ce4b 100644 >> --- a/default-configs/i386-softmmu.mak >> +++ b/default-configs/i386-softmmu.mak >> @@ -43,3 +43,6 @@ CONFIG_IOAPIC=y >> CONFIG_ICC_BUS=y >> CONFIG_PVPANIC=y >> CONFIG_MEM_HOTPLUG=y >> +CONFIG_XIO3130=y >> +CONFIG_IOH3420=y >> +CONFIG_I82801B11=y >> diff --git a/default-configs/x86_64-softmmu.mak b/default-configs/x86_64-softmmu.mak >> index e7c2734..6add04a 100644 >> --- a/default-configs/x86_64-softmmu.mak >> +++ b/default-configs/x86_64-softmmu.mak >> @@ -43,3 +43,6 @@ CONFIG_IOAPIC=y >> CONFIG_ICC_BUS=y >> CONFIG_PVPANIC=y >> CONFIG_MEM_HOTPLUG=y >> +CONFIG_XIO3130=y >> +CONFIG_IOH3420=y >> +CONFIG_I82801B11=y >> diff --git a/hw/pci-bridge/Makefile.objs b/hw/pci-bridge/Makefile.objs >> index 968b369..96c596e 100644 >> --- a/hw/pci-bridge/Makefile.objs >> +++ b/hw/pci-bridge/Makefile.objs >> @@ -1,5 +1,6 @@ >> common-obj-y += pci_bridge_dev.o >> -common-obj-y += ioh3420.o xio3130_upstream.o xio3130_downstream.o >> -common-obj-y += i82801b11.o >> +common-obj-$(CONFIG_XIO3130) += xio3130_upstream.o xio3130_downstream.o >> +common-obj-$(CONFIG_IOH3420) += ioh3420.o >> +common-obj-$(CONFIG_I82801B11) += i82801b11.o >> # NewWorld PowerMac >> common-obj-$(CONFIG_DEC_PCI) += dec.o >> > > > > . > -- Shannon