diff for duplicates of <555CC142.3010707@nvidia.com> diff --git a/a/1.txt b/N1/1.txt index 1c3bc07..b1c7087 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -2,7 +2,7 @@ On 5/18/2015 7:03 AM, Bill Huang wrote: > This fixes bug in tegra_clk_register_pllss() which mistakenly assume the > iddq register is the PLL base address. > -> Signed-off-by: Bill Huang <bilhuang@nvidia.com> +> Signed-off-by: Bill Huang <bilhuang-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> > --- > drivers/clk/tegra/clk-pll.c | 11 +++++++---- > 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/a/content_digest b/N1/content_digest index a7d52e1..00263ff 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,23 +1,24 @@ "ref\01431946983-29554-1-git-send-email-bilhuang@nvidia.com\0" - "From\0Rhyland Klein <rklein@nvidia.com>\0" + "ref\01431946983-29554-1-git-send-email-bilhuang-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org\0" + "From\0Rhyland Klein <rklein-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\0" "Subject\0Re: [PATCH 1/1] clk: tegra: read correct iddq register in PLL_SS registration\0" "Date\0Wed, 20 May 2015 13:15:46 -0400\0" - "To\0Bill Huang <bilhuang@nvidia.com>" - " <pdeschrijver@nvidia.com>\0" - "Cc\0<mturquette@linaro.org>" - <swarren@wwwdotorg.org> - <thierry.reding@gmail.com> - <pwalmsley@nvidia.com> - <linux-clk@vger.kernel.org> - <linux-tegra@vger.kernel.org> - " <linux-kernel@vger.kernel.org>\0" + "To\0Bill Huang <bilhuang-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>" + " pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org\0" + "Cc\0mturquette-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org" + swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org + thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org + pwalmsley-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org + linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org + linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org + " linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\0" "\00:1\0" "b\0" "On 5/18/2015 7:03 AM, Bill Huang wrote:\n" "> This fixes bug in tegra_clk_register_pllss() which mistakenly assume the\n" "> iddq register is the PLL base address.\n" "> \n" - "> Signed-off-by: Bill Huang <bilhuang@nvidia.com>\n" + "> Signed-off-by: Bill Huang <bilhuang-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\n" "> ---\n" "> drivers/clk/tegra/clk-pll.c | 11 +++++++----\n" "> 1 file changed, 7 insertions(+), 4 deletions(-)\n" @@ -64,4 +65,4 @@ "-- \n" nvpublic -571990433521ab28957630ccdd0e33040304bb26f317fa988aea1b3e9a5e1353 +d794e53ed62bfa115afed29d7c44fcef583519489a84f5b3223f8ecdc13e2ba8
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