From: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
To: Ralf Baechle <ralf@linux-mips.org>
Cc: <linux-mips@linux-mips.org>, <rusty@rustcorp.com.au>,
<alexinbeijing@gmail.com>, <paul.burton@imgtec.com>,
<david.daney@cavium.com>, <alex@alex-smith.me.uk>,
<linux-kernel@vger.kernel.org>, <james.hogan@imgtec.com>,
<markos.chandras@imgtec.com>, <macro@linux-mips.org>,
<eunb.song@samsung.com>, <manuel.lauss@gmail.com>,
<andreas.herrmann@caviumnetworks.com>
Subject: Re: [PATCH 1/2] MIPS: MSA: bugfix - disable MSA during thread switch correctly
Date: Fri, 22 May 2015 11:37:34 -0700 [thread overview]
Message-ID: <555F776E.3070904@imgtec.com> (raw)
In-Reply-To: <20150522093812.GH6941@linux-mips.org>
On 05/22/2015 02:38 AM, Ralf Baechle wrote:
> Just move the call to finish_arch_switch().
It might be a problem later, then a correct MSA partiton starts working.
It should be tight to saving MSA registers in that case.
> Your rewrite also dropped the if (cpu_has_msa) condition from
> disable_msa() probably causing havoc on lots of CPUs which will likely
> not decode the set bits of the MFC0/MTC0 instructions thus end up
> accessing Config0. Ralf
Right before this chunk of code there is a saving MSA registers. Does it
causing a havoc or else?
May I ask you to look into switch_to macro to figure out how "if
(cpu_has_msa)" check works in this case?
- Leonid.
WARNING: multiple messages have this Message-ID (diff)
From: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
To: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org, rusty@rustcorp.com.au,
alexinbeijing@gmail.com, paul.burton@imgtec.com,
david.daney@cavium.com, alex@alex-smith.me.uk,
linux-kernel@vger.kernel.org, james.hogan@imgtec.com,
markos.chandras@imgtec.com, macro@linux-mips.org,
eunb.song@samsung.com, manuel.lauss@gmail.com,
andreas.herrmann@caviumnetworks.com
Subject: Re: [PATCH 1/2] MIPS: MSA: bugfix - disable MSA during thread switch correctly
Date: Fri, 22 May 2015 11:37:34 -0700 [thread overview]
Message-ID: <555F776E.3070904@imgtec.com> (raw)
Message-ID: <20150522183734.T5yipRGQfIJBjv6YCoNUv_k2YTE5TpvlQ9SU7RcZAOw@z> (raw)
In-Reply-To: <20150522093812.GH6941@linux-mips.org>
On 05/22/2015 02:38 AM, Ralf Baechle wrote:
> Just move the call to finish_arch_switch().
It might be a problem later, then a correct MSA partiton starts working.
It should be tight to saving MSA registers in that case.
> Your rewrite also dropped the if (cpu_has_msa) condition from
> disable_msa() probably causing havoc on lots of CPUs which will likely
> not decode the set bits of the MFC0/MTC0 instructions thus end up
> accessing Config0. Ralf
Right before this chunk of code there is a saving MSA registers. Does it
causing a havoc or else?
May I ask you to look into switch_to macro to figure out how "if
(cpu_has_msa)" check works in this case?
- Leonid.
next prev parent reply other threads:[~2015-05-22 18:37 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-05-19 21:13 [PATCH 0/2] MIPS: MSA: bugfixes of context switch Leonid Yegoshin
2015-05-19 21:13 ` Leonid Yegoshin
2015-05-19 21:13 ` [PATCH 1/2] MIPS: MSA: bugfix - disable MSA during thread switch correctly Leonid Yegoshin
2015-05-19 21:13 ` Leonid Yegoshin
2015-05-21 9:12 ` Paul Burton
2015-05-21 9:12 ` Paul Burton
2015-05-21 16:11 ` Leonid Yegoshin
2015-05-21 16:20 ` [PATCH] MIPS: tidy up FPU context switching Paul Burton
2015-05-21 16:20 ` Paul Burton
2015-05-22 10:42 ` [PATCH v2] " Paul Burton
2015-05-22 10:42 ` Paul Burton
2015-05-22 9:38 ` [PATCH 1/2] MIPS: MSA: bugfix - disable MSA during thread switch correctly Ralf Baechle
2015-05-22 18:37 ` Leonid Yegoshin [this message]
2015-05-22 18:37 ` Leonid Yegoshin
2015-05-22 19:06 ` Leonid Yegoshin
2015-05-22 19:06 ` Leonid Yegoshin
2015-05-22 23:20 ` Ralf Baechle
2015-05-23 0:00 ` Leonid Yegoshin
2015-05-23 0:00 ` Leonid Yegoshin
2015-05-19 21:13 ` [PATCH 2/2] MIPS: MSA: bugfix of keeping MSA live context through clone or fork Leonid Yegoshin
2015-05-19 21:13 ` Leonid Yegoshin
2015-05-20 19:23 ` Leonid Yegoshin
2015-05-20 19:23 ` Leonid Yegoshin
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