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[127.0.0.1]) by director4.derp.mail-out.ovh.net (inspect_sender_mail_agent) with SMTP for ; Tue, 1 Sep 2026 06:59:23 +0000 (UTC) Received: from mta3.priv.ovhmail-u2.ea.mail.ovh.net (unknown [10.110.0.135]) by director4.derp.mail-out.ovh.net (Postfix) with ESMTPS id 4hYxYR1D3Jz1xtR; Tue, 1 Sep 2026 06:59:23 +0000 (UTC) Received: from kaod.org (unknown [10.1.6.5]) (Authenticated sender: clg@kaod.org) by mta3.priv.ovhmail-u2.ea.mail.ovh.net (Postfix) with ESMTPSA id 8071212E3FDD; Tue, 1 Sep 2026 06:59:21 +0000 (UTC) Authentication-Results: garm.ovh; auth=pass (GARM-95G0016b38368a-cab7-4b58-addd-5daf51f3de19, 60FF1D1BA71F1148B3CBA6CDBAED02576558214C) smtp.auth=clg@kaod.org X-OVh-ClientIp: 82.64.250.170 Message-ID: <5563e891-eba8-4e6b-ac47-e4b1ae5557ac@kaod.org> Date: Tue, 1 Sep 2026 08:59:21 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 07/25] hw/sensor: tmp105: add TMP75, TMP175 and LM75B variants To: Emmanuel Blot , qemu-devel@nongnu.org Cc: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= , Peter Maydell , Steven Lee , Jamin Lin , Kane Chen , Andrew Jeffery , Joel Stanley , qemu-arm@nongnu.org, Fabiano Rosas , Laurent Vivier , Paolo Bonzini , Thomas Huth , =?UTF-8?Q?Daniel_P=2E_Berrang=C3=A9?= , Emmanuel Blot References: <20260731-sanmiguel-bmc-locator-v2-0-1266926ba769@free.fr> <20260731-sanmiguel-bmc-locator-v2-7-1266926ba769@free.fr> From: =?UTF-8?Q?C=C3=A9dric_Le_Goater?= Content-Language: en-US, fr Autocrypt: addr=clg@kaod.org; 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v=1; b=eOBWXzzsnlM0Y4TKswaJWdP9Gzh+oId5QU5ExWyhfjP/r99fx/uvyFk0EG55sngToD7MI6Kp FSBAPVbf8KNWwt+Uz1rdMQGfjiyVmWfk9XrKQIulTodgpV4rPzprPRfdmulCG1iAQJr7YHZpJi3 PUP58RGOYm6mLwirx38rti946h9vm3EKBtTUtIl2rf6Y4Iu3+3Xp6jbCCcknGwuxujrTbUwNVdR QO/goK7AjYV2mWwg43PGjec6m9PGHdDDglySzFQCgZXSTnnngNyR0KBdRq5o7WH/nVfFdGgDZUH StDxZX3LYAfhkqbgHnVTpghKud3Q94xmvaNFFeJQR5HRQ== Received-SPF: pass client-ip=46.105.34.251; envelope-from=clg@kaod.org; helo=smtpout1.mo528.mail-out.ovh.net X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-arm@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org Sender: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org On 7/31/26 12:45, Emmanuel Blot wrote: > The TI TMP75/TMP175 and the NXP LM75B share the TMP105 register map and > control semantics, differing only in a few details. Model them as > variants of the TMP105, parameterised by a small per-type class > descriptor covering the fault-queue depths, the writable config bits, > the converter resolution, the set-point masks and the TMP75's > alert-clear on thermostat-mode change. > > The variant is class data, not migrated state, so the wire format is > unchanged and all variants share the existing vmstate. > > While here, align the shared shutdown handling with the hardware: > entering shutdown now clears the ALERT/OS output in interrupt mode, > correcting the base TMP105 as well. > > Signed-off-by: Emmanuel Blot > --- > hw/sensor/tmp105.c | 176 ++++++++++++++++++++++++++++++++++++--------- > include/hw/sensor/tmp105.h | 6 +- > 2 files changed, 148 insertions(+), 34 deletions(-) > > diff --git a/hw/sensor/tmp105.c b/hw/sensor/tmp105.c > index fefa661711..ece0650d70 100644 > --- a/hw/sensor/tmp105.c > +++ b/hw/sensor/tmp105.c > @@ -1,5 +1,5 @@ > /* > - * Texas Instruments TMP105 temperature sensor. > + * Texas Instruments TMP105/TMP75/TMP175/LM75B temperature sensor. > * > * Copyright (C) 2008 Nokia Corporation > * Written by Andrzej Zaborowski > @@ -16,6 +16,13 @@ > * > * You should have received a copy of the GNU General Public License along > * with this program; if not, see . > + * > + * Limitations: > + * - The SMBus Alert Response Address protocol and the general-call commands > + * are not implemented. > + * - The over-limit comparison uses the full 8.8 fixed-point temperature and a > + * ">=" boundary for every variant. The LM75B's 9-bit comparison quantisation > + * and strict-exceed boundary are therefore only approximated. > */ > > #include "qemu/osdep.h" > @@ -31,15 +38,8 @@ > #include "migration/vmstate.h" > #include "trace.h" > > -OBJECT_DECLARE_SIMPLE_TYPE(TMP105State, TMP105) > +OBJECT_DECLARE_TYPE(TMP105State, TMP105Class, TMP105) > > -/** > - * TMP105State: > - * @config: Bits 5 and 6 (value 32 and 64) determine the precision of the > - * temperature. See Table 8 in the data sheet. > - * > - * @see_also: http://www.ti.com/lit/gpn/tmp105 > - */ > struct TMP105State { > /*< private >*/ > I2CSlave parent_obj; > @@ -53,7 +53,7 @@ struct TMP105State { > uint8_t config; > int16_t temperature; > int16_t limit[2]; > - int faults; > + uint8_t faults; > uint8_t fault_count; > uint8_t alarm; > /* > @@ -65,6 +65,27 @@ struct TMP105State { > bool detect_falling; > }; > > +/* > + * Per-device-model parameters. The TMP105, TMP75, TMP175 and LM75B share the > + * same register map and control semantics; they differ only in a handful of > + * details captured here. > + * > + * @faultq: fault-queue length table selected by Config bits > + * @config_wmask: writable Config bits. The LM75B has no resolution (R1:R0) or > + * one-shot (OS) bits. > + * @fixed_res: converter resolution field pinned by the device, or -1 when it is > + * software-selectable. > + * @limit_lsb_mask: low-byte mask applied to the T_LOW/T_HIGH limit registers. > + */ > +struct TMP105Class { > + I2CSlaveClass parent_class; > + const uint8_t *faultq; > + uint8_t config_wmask; > + int8_t fixed_res; > + uint8_t limit_lsb_mask; > + bool tm_change_clears_alert; > +}; > + > FIELD(CONFIG, SHUTDOWN_MODE, 0, 1) > FIELD(CONFIG, THERMOSTAT_MODE, 1, 1) > FIELD(CONFIG, POLARITY, 2, 1) > @@ -152,10 +173,11 @@ static void tmp105_set_temperature(Object *obj, Visitor *v, const char *name, > tmp105_alarm_update(s, false); > } > > -static const int tmp105_faultq[4] = { 1, 2, 4, 6 }; > - > static void tmp105_read(TMP105State *s) > { > + const TMP105Class *tc = TMP105_GET_CLASS(s); > + int res; > + > s->len = 0; > > if (FIELD_EX8(s->config, CONFIG, THERMOSTAT_MODE)) { > @@ -165,9 +187,11 @@ static void tmp105_read(TMP105State *s) > > switch (s->pointer & 3) { > case TMP105_REG_TEMPERATURE: > + res = tc->fixed_res >= 0 ? tc->fixed_res : > + FIELD_EX8(s->config, CONFIG, CONVERTER_RESOLUTION); > s->buf[s->len++] = (((uint16_t) s->temperature) >> 8); > s->buf[s->len++] = (((uint16_t) s->temperature) >> 0) & > - (0xf0 << (FIELD_EX8(~s->config, CONFIG, CONVERTER_RESOLUTION))); > + (0xf0 << (3 - res)); > break; > > case TMP105_REG_CONFIG: > @@ -190,6 +214,10 @@ static void tmp105_read(TMP105State *s) > > static void tmp105_write(TMP105State *s) > { > + const TMP105Class *tc = TMP105_GET_CLASS(s); > + uint8_t config, one_shot; > + bool waking; > + > trace_tmp105_write(s->parent_obj.address, s->pointer); > > switch (s->pointer & 3) { > @@ -197,14 +225,27 @@ static void tmp105_write(TMP105State *s) > break; > > case TMP105_REG_CONFIG: > - if (FIELD_EX8(s->buf[0] & ~s->config, CONFIG, SHUTDOWN_MODE)) { > + config = s->buf[0] & tc->config_wmask; > + if (FIELD_EX8(config & ~s->config, CONFIG, SHUTDOWN_MODE)) { > trace_tmp105_write_shutdown(s->parent_obj.address); > + if (FIELD_EX8(config, CONFIG, THERMOSTAT_MODE)) { > + s->alarm = 0; > + } > } > - s->config = FIELD_DP8(s->buf[0], CONFIG, ONE_SHOT, 0); > - s->faults = tmp105_faultq[FIELD_EX8(s->config, CONFIG, FAULT_QUEUE)]; > - if (FIELD_EX8(s->buf[0], CONFIG, ONE_SHOT) && > - FIELD_EX8(s->config, CONFIG, SHUTDOWN_MODE)) { > + if (tc->tm_change_clears_alert && > + FIELD_EX8(config ^ s->config, CONFIG, THERMOSTAT_MODE)) { > + s->alarm = 0; > + s->fault_count = 0; > + s->detect_falling = false; > + } > + waking = FIELD_EX8(s->config & ~config, CONFIG, SHUTDOWN_MODE); > + one_shot = FIELD_EX8(config, CONFIG, ONE_SHOT); > + s->config = FIELD_DP8(config, CONFIG, ONE_SHOT, 0); > + s->faults = tc->faultq[FIELD_EX8(s->config, CONFIG, FAULT_QUEUE)]; > + if (one_shot && FIELD_EX8(s->config, CONFIG, SHUTDOWN_MODE)) { > tmp105_alarm_update(s, true); > + } else if (waking) { > + tmp105_alarm_update(s, false); > } else { > tmp105_interrupt_update(s); > } > @@ -214,7 +255,8 @@ static void tmp105_write(TMP105State *s) > case TMP105_REG_T_HIGH: > if (s->len >= 3) { > s->limit[s->pointer & 1] = (int16_t) > - ((((uint16_t) s->buf[0]) << 8) | (s->buf[1] & 0xf0)); > + ((((uint16_t) s->buf[0]) << 8) | > + (s->buf[1] & tc->limit_lsb_mask)); > } > tmp105_interrupt_update(s); > break; > @@ -265,8 +307,9 @@ static int tmp105_event(I2CSlave *i2c, enum i2c_event event) > static int tmp105_post_load(void *opaque, int version_id) > { > TMP105State *s = opaque; > + const TMP105Class *tc = TMP105_GET_CLASS(s); > > - s->faults = tmp105_faultq[FIELD_EX8(s->config, CONFIG, FAULT_QUEUE)]; > + s->faults = tc->faultq[FIELD_EX8(s->config, CONFIG, FAULT_QUEUE)]; > > tmp105_interrupt_update(s); > return 0; > @@ -339,11 +382,12 @@ static const VMStateDescription vmstate_tmp105 = { > static void tmp105_reset_hold(Object *obj, ResetType type) > { > TMP105State *s = TMP105(obj); > + const TMP105Class *tc = TMP105_GET_CLASS(s); > > s->temperature = 0; > s->pointer = 0; > s->config = 0; > - s->faults = tmp105_faultq[FIELD_EX8(s->config, CONFIG, FAULT_QUEUE)]; > + s->faults = tc->faultq[FIELD_EX8(s->config, CONFIG, FAULT_QUEUE)]; > s->fault_count = 0; > s->alarm = 0; > s->detect_falling = false; > @@ -371,11 +415,25 @@ static void tmp105_initfn(Object *obj) > "Temperature, in millidegrees Celsius"); > } > > +/* > + * Fault-queue length selected by Config F1:F0. Row 0 (1/2/4/6) is used by the > + * TMP105, TMP175 and LM75B; row 1 (1/2/3/4) by the TMP75. > + */ > +static const uint8_t tmp105_faultq[][4] = { > + { 1, 2, 4, 6 }, > + { 1, 2, 3, 4 }, > +}; > + > +/* The F1:F0 field must never index past a fault-queue table row. */ > +QEMU_BUILD_BUG_ON((1 << R_CONFIG_FAULT_QUEUE_LENGTH) - 1 >= > + ARRAY_SIZE(tmp105_faultq[0])); > + > static void tmp105_class_init(ObjectClass *klass, const void *data) > { > DeviceClass *dc = DEVICE_CLASS(klass); > I2CSlaveClass *k = I2C_SLAVE_CLASS(klass); > ResettableClass *rc = RESETTABLE_CLASS(klass); > + TMP105Class *tc = TMP105_CLASS(klass); > > dc->realize = tmp105_realize; > k->event = tmp105_event; > @@ -383,19 +441,71 @@ static void tmp105_class_init(ObjectClass *klass, const void *data) > k->send = tmp105_tx; > rc->phases.hold = tmp105_reset_hold; > dc->vmsd = &vmstate_tmp105; > + > + tc->faultq = tmp105_faultq[0]; > + tc->config_wmask = 0xff; > + tc->fixed_res = -1; > + tc->limit_lsb_mask = 0xf0; > + tc->tm_change_clears_alert = false; > +} > + > +static void tmp175_class_init(ObjectClass *klass, const void *data) > +{ > + TMP105Class *tc = TMP105_CLASS(klass); > + > + tc->faultq = tmp105_faultq[0]; > + tc->config_wmask = 0xff; > + tc->fixed_res = -1; > + tc->limit_lsb_mask = 0xf0; > + tc->tm_change_clears_alert = false; > +} > + > +static void tmp75_class_init(ObjectClass *klass, const void *data) > +{ > + TMP105Class *tc = TMP105_CLASS(klass); > + > + tc->faultq = tmp105_faultq[1]; > + tc->config_wmask = 0xff; > + tc->fixed_res = -1; > + tc->limit_lsb_mask = 0xf0; > + tc->tm_change_clears_alert = true; > +} > + > +static void lm75b_class_init(ObjectClass *klass, const void *data) > +{ > + TMP105Class *tc = TMP105_CLASS(klass); > + > + tc->faultq = tmp105_faultq[0]; > + tc->config_wmask = 0x1f; > + tc->fixed_res = 2; > + tc->limit_lsb_mask = 0x80; > + tc->tm_change_clears_alert = false; > } > > -static const TypeInfo tmp105_info = { > - .name = TYPE_TMP105, > - .parent = TYPE_I2C_SLAVE, > - .instance_size = sizeof(TMP105State), > - .instance_init = tmp105_initfn, > - .class_init = tmp105_class_init, > +static const TypeInfo tmp105_types[] = { > + { > + .name = TYPE_TMP105, > + .parent = TYPE_I2C_SLAVE, > + .instance_size = sizeof(TMP105State), > + .class_size = sizeof(TMP105Class), > + .instance_init = tmp105_initfn, > + .class_init = tmp105_class_init, > + }, > + { > + .name = TYPE_TMP175, > + .parent = TYPE_TMP105, > + .class_init = tmp175_class_init, > + }, > + { > + .name = TYPE_TMP75, > + .parent = TYPE_TMP105, > + .class_init = tmp75_class_init, > + }, > + { > + .name = TYPE_LM75B, > + .parent = TYPE_TMP105, > + .class_init = lm75b_class_init, > + }, > }; > > -static void tmp105_register_types(void) > -{ > - type_register_static(&tmp105_info); > -} > - > -type_init(tmp105_register_types) > +DEFINE_TYPES(tmp105_types) > diff --git a/include/hw/sensor/tmp105.h b/include/hw/sensor/tmp105.h > index daece592e9..0698aeead7 100644 > --- a/include/hw/sensor/tmp105.h > +++ b/include/hw/sensor/tmp105.h > @@ -1,5 +1,5 @@ > /* > - * Texas Instruments TMP105 Temperature Sensor > + * Texas Instruments TMP105/TMP75/TMP175/LM75B Temperature Sensor > * > * Browse the data sheet: > * > @@ -14,6 +14,10 @@ > #ifndef HW_SENSOR_TMP105_H > #define HW_SENSOR_TMP105_H > > +/* TMP75, TMP175 and NXP LM75B are register-compatible with TMP105. */ > #define TYPE_TMP105 "tmp105" > +#define TYPE_TMP175 "tmp175" > +#define TYPE_TMP75 "tmp75" > +#define TYPE_LM75B "lm75b" > > #endif > Reviewed-by: Cédric Le Goater Thanks, C.