From mboxrd@z Thu Jan 1 00:00:00 1970 From: Julien Grall Subject: Re: [PATCH V5 07/10] xen/arm: Set 'reg' of cpu node for dom0 to match MPIDR's affinity Date: Sun, 31 May 2015 14:20:25 +0100 Message-ID: <556B0A99.1060102@citrix.com> References: <1432984051-10838-1-git-send-email-cbz@baozis.org> <1432984051-10838-8-git-send-email-cbz@baozis.org> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii"; Format="flowed" Content-Transfer-Encoding: 7bit Return-path: Received: from mail6.bemta14.messagelabs.com ([193.109.254.103]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1Yz3AK-0005PQ-16 for xen-devel@lists.xenproject.org; Sun, 31 May 2015 13:20:36 +0000 In-Reply-To: <1432984051-10838-8-git-send-email-cbz@baozis.org> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Chen Baozi , xen-devel@lists.xenproject.org Cc: Julien Grall , Chen Baozi , Ian Campbell List-Id: xen-devel@lists.xenproject.org Hi Chen, On 30/05/2015 12:07, Chen Baozi wrote: > From: Chen Baozi > > According to ARM CPUs bindings, the reg field should match the MPIDR's > affinity bits. We will use AFF0 and AFF1 when constructing the reg value > of the guest at the moment, for it is enough for the current max vcpu > number. > > Signed-off-by: Chen Baozi > --- > xen/arch/arm/domain_build.c | 14 +++++++++++--- > 1 file changed, 11 insertions(+), 3 deletions(-) > > diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c > index a156de9..5591d82 100644 > --- a/xen/arch/arm/domain_build.c > +++ b/xen/arch/arm/domain_build.c > @@ -712,6 +712,7 @@ static int make_cpus_node(const struct domain *d, void *fdt, > char buf[15]; > u32 clock_frequency; > bool_t clock_valid; > + uint32_t mpidr_aff; Please be consistent. Either use unsigned int (as you did in #2) or uint64_t (as you did in #6) or uint32_t (as you did here). But not three different possibility as you did. TBH, I would prefer the uint64_t as the affinity can go up to 64 bits (see with AFF3). > > DPRINT("Create cpus node\n"); > > @@ -761,9 +762,16 @@ static int make_cpus_node(const struct domain *d, void *fdt, > > for ( cpu = 0; cpu < d->max_vcpus; cpu++ ) > { > - DPRINT("Create cpu@%u node\n", cpu); > + /* > + * According to ARM CPUs bindings, the reg field should match > + * the MPIDR's affinity bits. We will use AFF0 and AFF1 when > + * constructing the reg value of the guest at the moment, for it > + * is enough for the current max vcpu number. > + */ > + mpidr_aff = vcpuid_to_vaffinity(cpu); > + DPRINT("Create cpu@%x node\n", mpidr_aff); The change I requested here is lying in the next patch (i.e #8)... Please move it here. Regards, -- -- Julien Grall