Re: Audio play problem with tlv320aic3106 in mainline.

[Peter Ujfalusi <peter.ujfalusi@ti.com>]

On 06/01/2015 12:16 PM, Enric Balletbo Serra wrote:
> Hi,
> 
> 2015-05-29 14:16 GMT+02:00 Peter Ujfalusi <peter.ujfalusi@ti.com>:
>> On 05/29/2015 12:24 PM, Enric Balletbo Serra wrote:
>>>> It might be really 24MHz.
>>>> If the MCLK in your board is wired like am335x-evmsk or how BeagleBone's audio
>>>> capes are wired (MCLK is coming from AM335x's EVENT_INTR0/1 pin as CLKOUT1/2)
>>>> then 24MHz is correct. On the am335x-evm there is a dedicated crystal
>>>> providing the 12MHz.
>>>>
>>> Well, in my board there is also a dedicated crystal providing the
>>> 12MHz, so I expect that the correct value for clock-frequency is 12MHz
>>> not 24MHz.
>>
>> I was wrong with the BBW audio cape.. At least the RevA which I have does have
>> 12MHz crystal connected to aic3106 MCLK, but there is a line to the SoC's
>> CLKOUT2. By default the codec runs using the 12MHz.
>> I have checked with a scope and yep, I have 12MHz for MCLK.
>>
>>>
>>>     clocks {
>>>         compatible = "simple-bus";
>>>         #address-cells = <1>;
>>>         #size-cells = <0>;
>>>
>>>         /* audio external oscillator */
>>>         tlv320aic3x_mclk: oscillator@0 {
>>>             compatible = "fixed-clock";
>>>             #clock-cells = <0>;
>>>             clock-frequency  = <12000000>;    /* 12MHz */
>>>         };
>>>     };
>>>
>>>     sound {
>>>         compatible = "ti,da830-evm-audio";
>>>         ti,model = "AM335x-SL50";
>>>         ti,audio-codec = <&audio_codec>;
>>>         ti,mcasp-controller = <&mcasp0>;
>>>
>>>         clocks = <&tlv320aic3x_mclk>;
>>>         clock-names = "mclk";
>>>
>>>         ti,audio-routing =
>>>             "Headphone Jack",    "HPLOUT",
>>>             "Headphone Jack",    "HPROUT",
>>>             "LINE1R",               "Line In",
>>>             "LINE1L",        "Line In";
>>>     };
>>
>> If I use this with my BBW+Audio cape: audio is fine.
>>
> 
> Tested with linux-next and same problem here, I also checked with a
> scope my clock and it's 12MHz but I need to apply this patch to make
> it work.
> 
> diff --git a/sound/soc/davinci/davinci-evm.c b/sound/soc/davinci/davinci-evm.c
> index 731fb0d..8ce0d32 100644
> --- a/sound/soc/davinci/davinci-evm.c
> +++ b/sound/soc/davinci/davinci-evm.c
> @@ -64,6 +64,11 @@ static int evm_hw_params(struct snd_pcm_substream *substream,
>         unsigned sysclk = ((struct snd_soc_card_drvdata_davinci *)
>                            snd_soc_card_get_drvdata(soc_card))->sysclk;
> 
> +    ret = snd_soc_dai_set_clkdiv(cpu_dai, 0, 2);
> +    if (ret < 0)
> +            return ret;

This does not make sense... McASP is supposed to be slave when used with
compatible = "ti,da830-evm-audio"
This means that the reference clock is coming from internal source and AHCLKX
pin is output.
Setting the divider for the high-frequency clock should not be needed since
the McASP is not generating any of the clocks.

BTW: I see that in the DTS you are configuring the mcasp0.ahclkx pin. How this
is used?
While we are here, you can change the AXR2 pinmux to output.

I have 'cloned' your setup on my BBW+AudioCape where I also have 12MHz MCLK. I
don't have any problem with the playback speed.

-- 
Péter