From: Shannon Zhao <zhaoshenglong@huawei.com>
To: Andrew Jones <drjones@redhat.com>, qemu-devel@nongnu.org
Cc: imammedo@redhat.com, shannon.zhao@linaro.org, mst@redhat.com
Subject: Re: [Qemu-devel] [PATCH 2/2] hw/arm/virt-acpi-build: Add SPCR table
Date: Tue, 9 Jun 2015 10:54:44 +0800 [thread overview]
Message-ID: <55765574.7080503@huawei.com> (raw)
In-Reply-To: <1433772050-28113-3-git-send-email-drjones@redhat.com>
On 2015/6/8 22:00, Andrew Jones wrote:
> Signed-off-by: Andrew Jones <drjones@redhat.com>
> ---
> hw/arm/virt-acpi-build.c | 44 +++++++++++++++++++++++++++++++++++++++++++-
> 1 file changed, 43 insertions(+), 1 deletion(-)
>
> diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
> index a9373ccaca6cb..192bbecf6e573 100644
> --- a/hw/arm/virt-acpi-build.c
> +++ b/hw/arm/virt-acpi-build.c
> @@ -84,6 +84,13 @@ static void acpi_dsdt_add_uart(Aml *scope, const MemMapEntry *uart_memmap,
> aml_interrupt(AML_CONSUMER, AML_LEVEL, AML_ACTIVE_HIGH,
> AML_EXCLUSIVE, uart_irq));
> aml_append(dev, aml_name_decl("_CRS", crs));
> +
> + /*
> + * The _ADR entry is used to link this device to the UART described
> + * in the SPCR table.
> + */
> + aml_append(dev, aml_name_decl("_ADR", aml_int(uart_memmap->base)));
> +
> aml_append(scope, dev);
> }
>
> @@ -334,6 +341,38 @@ build_rsdp(GArray *rsdp_table, GArray *linker, unsigned rsdt)
> }
>
> static void
> +build_spcr(GArray *table_data, GArray *linker, VirtGuestInfo *guest_info)
> +{
> + AcpiSerialPortConsoleRedirection *spcr;
> + const MemMapEntry *memmap = &guest_info->memmap[VIRT_UART];
> + int irq = guest_info->irqmap[VIRT_UART] + ARM_SPI_BASE;
> +
> + spcr = acpi_data_push(table_data, sizeof(*spcr));
> +
> + spcr->interface_type = ACPI_SERIAL_ARM_PL011_UART;
> +
> + spcr->base_address.space_id = 0; /* System Memory */
> + spcr->base_address.bit_width = 8;
> + spcr->base_address.bit_offset = 0;
> + spcr->base_address.access_width = 1;
> + spcr->base_address.address = cpu_to_le64(memmap->base);
> +
> + spcr->interrupt_types = ACPI_SERIAL_ITYPE_ARMH_GIC;
> + spcr->gsi = cpu_to_le32(irq);
> +
> + spcr->baud = ACPI_SERIAL_BAUD_9600;
> + spcr->parity = 0;
> + spcr->stopbits = 1;
> + spcr->flowctrl = ACPI_SERIAL_FLOW_HW;
> + spcr->term_type = ACPI_SERIAL_TERM_VT100;
> +
> + spcr->pci_device_id = 0xffff;
> + spcr->pci_vendor_id = 0xffff;
> +
> + build_header(linker, table_data, (void *)spcr, "SPCR", sizeof(*spcr), 5);
Look at the SPCR table spec, it says the revision is 2.
> +}
> +
> +static void
> build_mcfg(GArray *table_data, GArray *linker, VirtGuestInfo *guest_info)
> {
> AcpiTableMcfg *mcfg;
> @@ -514,7 +553,7 @@ void virt_acpi_build(VirtGuestInfo *guest_info, AcpiBuildTables *tables)
> dsdt = tables_blob->len;
> build_dsdt(tables_blob, tables->linker, guest_info);
>
> - /* FADT MADT GTDT pointed to by RSDT */
> + /* FADT MADT GTDT SPCR pointed to by RSDT */
> acpi_add_table(table_offsets, tables_blob);
> build_fadt(tables_blob, tables->linker, dsdt);
>
> @@ -527,6 +566,9 @@ void virt_acpi_build(VirtGuestInfo *guest_info, AcpiBuildTables *tables)
> acpi_add_table(table_offsets, tables_blob);
> build_mcfg(tables_blob, tables->linker, guest_info);
>
> + acpi_add_table(table_offsets, tables_blob);
> + build_spcr(tables_blob, tables->linker, guest_info);
> +
> /* RSDT is pointed to by RSDP */
> rsdt = tables_blob->len;
> build_rsdt(tables_blob, tables->linker, table_offsets);
>
--
Shannon
next prev parent reply other threads:[~2015-06-09 2:55 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-06-08 14:00 [Qemu-devel] [PATCH 0/2] ACPI: ARM: add SPCR table Andrew Jones
2015-06-08 14:00 ` [Qemu-devel] [PATCH 1/2] ACPI: Add definitions for the " Andrew Jones
2015-06-09 10:53 ` Shannon Zhao
2015-06-09 14:52 ` Michael S. Tsirkin
2015-06-09 17:03 ` Andrew Jones
2015-06-09 17:28 ` Michael S. Tsirkin
2015-06-08 14:00 ` [Qemu-devel] [PATCH 2/2] hw/arm/virt-acpi-build: Add " Andrew Jones
2015-06-09 2:54 ` Shannon Zhao [this message]
2015-06-09 9:53 ` Andrew Jones
2015-06-09 11:10 ` Shannon Zhao
2015-06-09 11:13 ` [Qemu-devel] [PATCH 0/2] ACPI: ARM: add " Shannon Zhao
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