From mboxrd@z Thu Jan  1 00:00:00 1970
From: Julien Grall <julien.grall@citrix.com>
Subject: Re: [PATCH v7 6/8] xen/arm: Set 'reg' of cpu node for
 dom0 to match MPIDR's affinity
Date: Thu, 11 Jun 2015 11:05:25 -0400
Message-ID: <5579A3B5.2000800@citrix.com>
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To: Chen Baozi <cbz@baozis.org>, xen-devel@lists.xenproject.org
Cc: Chen Baozi <baozich@gmail.com>, Ian Campbell <ian.campbell@citrix.com>
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Hi Chen,

On 11/06/2015 09:05, Chen Baozi wrote:
> From: Chen Baozi <baozich@gmail.com>
>
> According to ARM CPUs bindings, the reg field should match the MPIDR's
> affinity bits. We will use AFF0 and AFF1 when constructing the reg value
> of the guest at the moment, for it is enough for the current max vcpu
> number.
>
> Signed-off-by: Chen Baozi <baozich@gmail.com>
> Acked-by: Ian Campbell <ian.campbell@citrix.com>
Reviewed-by: Julien Grall <julien.grall@citrix.com>

Regards,

-- 
Julien Grall