From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andrew Cooper Subject: Re: Relocatable Xen early boot code Date: Fri, 12 Jun 2015 16:30:06 +0100 Message-ID: <557AFAFE.4020806@citrix.com> References: <20150612111409.GJ19315@olila.local.net-space.pl> <557ADC45.3040604@citrix.com> <20150612143645.GO19315@olila.local.net-space.pl> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail6.bemta5.messagelabs.com ([195.245.231.135]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1Z3QvA-0002xg-P7 for xen-devel@lists.xenproject.org; Fri, 12 Jun 2015 15:31:04 +0000 In-Reply-To: <20150612143645.GO19315@olila.local.net-space.pl> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Daniel Kiper Cc: xen-devel@lists.xenproject.org, keir@xen.org, jbeulich@suse.com List-Id: xen-devel@lists.xenproject.org On 12/06/15 15:36, Daniel Kiper wrote: >> As stated at the hackathon, the problem with using %ebp is that it turns >> all implicit %ds references into implicit %ss references, and tends to > I am aware of that. However, I think that this is not a problem right > now because %ds == %ss. Some data segment attributes have different meanings when loaded into %ss, than when loaded into any of the plain data segment registers. I believe what we have is compatible between the two. but... > Additionally, I do not think that it will change in the future. Stack references behave differently to data references. For example, a non-canonical addresses generate a #GP fault for data references, or a #SS fault for stack references. The concern with implicit stack references comes from the subtle behaviour changes, not because it won't work in the general case. > >> add a SIB+imm32 to each instruction with a memory reference (ebp >> relative memory references, and r13 for that matter, have restrictions >> in the way in which they can be encoded). > I am not sure what are you talking about here. What do you mean by r13? > Register name? In 32-bit mode? Could you point me a paragraph in Intel > or AMD docs which says about this restrictions? This isn't a restriction pe say. It is a properly of ModRM/SIB encoding. It is described in both the Intel and AMD instruction reference manuals. ~Andrew