From mboxrd@z Thu Jan 1 00:00:00 1970 From: Vikram Sethi Subject: Re: HCPTR cp15 writes need isb? Date: Tue, 16 Jun 2015 12:51:51 -0500 Message-ID: <55806237.7060405@codeaurora.org> References: <557F7D1F.1070308@codeaurora.org> <20150616074624.64b7d71c@why.wild-wind.fr.eu.org> <558016CE.2050103@codeaurora.org> <55801AF3.3010705@arm.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from localhost (localhost [127.0.0.1]) by mm01.cs.columbia.edu (Postfix) with ESMTP id F295555748 for ; Tue, 16 Jun 2015 13:41:20 -0400 (EDT) Received: from mm01.cs.columbia.edu ([127.0.0.1]) by localhost (mm01.cs.columbia.edu [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id r3lXq6kiFvDP for ; Tue, 16 Jun 2015 13:41:19 -0400 (EDT) Received: from smtp.codeaurora.org (smtp.codeaurora.org [198.145.29.96]) by mm01.cs.columbia.edu (Postfix) with ESMTPS id 40E4A5573A for ; Tue, 16 Jun 2015 13:41:18 -0400 (EDT) In-Reply-To: <55801AF3.3010705@arm.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kvmarm-bounces@lists.cs.columbia.edu Sender: kvmarm-bounces@lists.cs.columbia.edu To: Marc Zyngier Cc: Catalin Marinas , Will Deacon , "mmcilvai@qti.qualcomm.com" , "vikrams@qti.qualcomm.com" , "kvmarm@lists.cs.columbia.edu" List-Id: kvmarm@lists.cs.columbia.edu On 06/16/15 07:47, Marc Zyngier wrote: > On 16/06/15 13:30, Vikram Sethi wrote: >> On 06/16/15 01:46, Marc Zyngier wrote: >>> On Tue, 16 Jun 2015 02:34:23 +0100 >>> Vikram Sethi wrote: >>> >>> Hi Vikram, >>> >>>> Hi Marc, Christoffer, Catalin, Will, >>>> >>>> I'm seeing an issue with KVM HCPTR (cp15) writes on guest entry/exit >>>> on one of Qualcomm's CPU cores in AArch32 host and AArch32 guest >>>> mode. Our CPU architects believe that HCPTR cp15 writes are context >>>> changing and require an isb. With an isb in set_hcptr macro in >>>> arch/arm/kvm/interrupts_head.S I am able to boot the Aarch32 guest, >>>> but without it, I see strange crashes to hyp_undef or hyp_pabt. >>> [...] >>> >>> Can you look at the following patch (queued for 4.2)? >>> >>> http://lists.infradead.org/pipermail/linux-arm-kernel/2015-March/330955.html >>> >>> Please let me know if this solves the issue you are seeing. >> Don't we have the same issue the first time guest touches FP and >> traps i.e in switch_to_guest_vfp where we turn on floating point >> access in HCPTR and immediately access FPEXC in store_vfp_state >> without a isb? > Good point, looks like my initial fix is incomplete. I'll repost a more > complete fix but in the meantime, does adding the following work for you? Yes, the additional isb in switch_to_guest_vfp along with your original patch works for me. When you refactor the original patch will it be cleaner to handle the isb in the set_hcptr macro whenever it is changed to not trap VFP access? > > diff --git a/arch/arm/kvm/interrupts.S b/arch/arm/kvm/interrupts.S > index 3ac7aca..5b30047 100644 > --- a/arch/arm/kvm/interrupts.S > +++ b/arch/arm/kvm/interrupts.S > @@ -487,6 +487,7 @@ switch_to_guest_vfp: > > @ NEON/VFP used. Turn on VFP access. > set_hcptr vmexit, (HCPTR_TCP(10) | HCPTR_TCP(11)) > + isb @ Force execution of HCPTR as we've just reenabled VFP access > > @ Switch VFP/NEON hardware state to the guest's > add r7, r0, #VCPU_VFP_HOST > > Thanks, > > M. -- Vikram Sethi Qualcomm Technologies Inc, on behalf of Qualcomm Innovation Center, Inc. Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project