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Date: Mon, 22 Jun 2015 13:19:53 +0100
From: Leon Alrae <leon.alrae@imgtec.com>
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Subject: Re: [Qemu-devel] [PATCH v2 13/15] target-mips: microMIPS32 R6 Major
	instructions
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To: Yongbok Kim <yongbok.kim@imgtec.com>, qemu-devel@nongnu.org
Cc: aurelien@aurel32.net

On 19/06/2015 17:25, Yongbok Kim wrote:
> @@ -14958,8 +14966,28 @@ static void decode_micromips32_opc(CPUMIPSState *env, DisasContext *ctx)
>      do_cop1:
>          gen_cop1_ldst(ctx, mips32_op, rt, rs, imm);
>          break;
> -    case ADDIUPC:
> -        {
> +    case ADDIUPC: /* PCREL: ADDIUPC, AUIPC, ALUIPC, LWPC */
> +        if (ctx->insn_flags & ISA_MIPS32R6) {
> +            /* PCREL: ADDIUPC, AUIPC, ALUIPC, LWPC */
> +            switch ((ctx->opcode >> 16) & 0x1f) {
> +            case ADDIUPC_00 ... ADDIUPC_07:
> +                gen_pcrel(ctx, OPC_ADDIUPC, ctx->pc & ~0x3, rt);
> +                break;
> +            case AUIPC:
> +                gen_pcrel(ctx, OPC_AUIPC, ctx->pc, rt);

According to the manual you should pass "ctx->pc & ~0x3" here. Otherwise the
patch looks good to me.

Leon