From: Stefan Roese <sr@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 0/3] spi: cadence_qspi: sram depth from DT & fix for FIFO width
Date: Wed, 24 Jun 2015 12:09:26 +0200 [thread overview]
Message-ID: <558A81D6.6030403@denx.de> (raw)
In-Reply-To: <9026814FBF99304F9FA3AC3FB72F3E2F016A87DD@SAFEX1MAIL4.st.com>
Hi Vikas,
On 23.06.2015 16:48, Vikas MANOCHA wrote:
>> -----Original Message-----
>> From: Stefan Roese [mailto:sr at denx.de]
>> Sent: Friday, June 12, 2015 5:10 AM
>> To: Vikas MANOCHA; u-boot at lists.denx.de;
>> grmoore at opensource.altera.com; dinguyen at opensource.altera.com
>> Subject: Re: [PATCH 0/3] spi: cadence_qspi: sram depth from DT & fix for
>> FIFO width
>>
>> Hi Vikas,
>>
>> On 11.06.2015 21:16, Vikas MANOCHA wrote:
>>> Any comments on the patchset.
>>
>> I'll test them next week on a SoCFPGA based board and will comment then
>> again.
>
> Can you please test this patchset also.
Okay. I've now tested this 3 patch series as well on top of mainline.
And SPI NOR seems to work just fine with this one applied. Not errors
and the write/read/compare test also works okay.
HTP.
Thanks,
Stefan
next prev parent reply other threads:[~2015-06-24 10:09 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-06-10 1:24 [U-Boot] [PATCH 0/3] spi: cadence_qspi: sram depth from DT & fix for FIFO width Vikas Manocha
2015-06-10 1:24 ` [U-Boot] [PATCH 1/3] spi: cadence_qspi: move the sram partition in init Vikas Manocha
2015-06-10 1:24 ` [U-Boot] [PATCH 2/3] spi: cadence_qspi: get sram size from device tree Vikas Manocha
2015-06-10 1:24 ` [U-Boot] [PATCH 3/3] spi: cadence_qspi: support FIFO width other than 4 bytes Vikas Manocha
2015-06-11 19:16 ` [U-Boot] [PATCH 0/3] spi: cadence_qspi: sram depth from DT & fix for FIFO width Vikas MANOCHA
2015-06-12 12:10 ` Stefan Roese
2015-06-23 14:48 ` Vikas MANOCHA
2015-06-24 10:09 ` Stefan Roese [this message]
2015-06-24 18:13 ` Vikas MANOCHA
2015-06-24 18:54 ` Jagan Teki
2015-06-24 21:20 ` Vikas MANOCHA
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