From: Prarit Bhargava <prarit@redhat.com>
To: Andy Lutomirski <luto@amacapital.net>
Cc: Ingo Molnar <mingo@kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"H. Peter Anvin" <hpa@zytor.com>,
Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, X86 ML <x86@kernel.org>,
Len Brown <len.brown@intel.com>,
Dasaratharaman Chandramouli
<dasaratharaman.chandramouli@intel.com>,
Peter Zijlstra <a.p.zijlstra@chello.nl>,
Borislav Petkov <bp@alien8.de>, Andy Lutomirski <luto@kernel.org>,
Denys Vlasenko <dvlasenk@redhat.com>,
Brian Gerst <brgerst@gmail.com>,
Arnaldo Carvalho de Melo <acme@infradead.org>
Subject: Re: [PATCH] x86, msr: Allow read access to /dev/cpu/X/msr
Date: Sun, 28 Jun 2015 10:34:05 -0400 [thread overview]
Message-ID: <559005DD.3070003@redhat.com> (raw)
In-Reply-To: <CALCETrXpiMWwiAfbxcKTDYCewrwq-UTwLV+xXTxdOkd+B3G-OQ@mail.gmail.com>
On 06/27/2015 11:52 AM, Andy Lutomirski wrote:
> On Sat, Jun 27, 2015 at 1:39 AM, Ingo Molnar <mingo@kernel.org> wrote:
>>
>> * Ingo Molnar <mingo@kernel.org> wrote:
>>
>>> So what's wrong with exposing them as a simplified PMU driver?
>>>
>>> That way we only expose the ones we want to - plus tooling can use all the rich
>>> perf features that can be used around this. (sampling, counting, call chains,
>>> etc.)
>>
>> See below code from Andy that exposes a single MSR via perf. At the core of the
>> PMU driver is a single rdmsrl():
>>
>> +static void aperfmperf_event_start(struct perf_event *event, int flags)
>> +{
>> + u64 now;
>> +
>> + rdmsrl(event->hw.event_base, now);
>> + local64_set(&event->hw.prev_count, now);
>> +}
>>
I just sat down to do something similar to what Andy had proposed here :).
>> Now I think what we really want is to expose not a single MSR but multiple MSRs in
>> a single driver, i.e. don't have one PMU driver per MSR, but have a driver that
>> allows the exposure of select MSRs as counters.
>
> I'm way ahead of you: this driver can expose *two* MSRs as counters :)
>
> Seriously, though, it would be straightforward to make it handle a
> more general list, complete with non-architectural stuff (such as the
> upcoming PPERF in Skylake).
Is it easier to blacklist MSRs we don't want generally exposed, or only expose
the ones that we think are safe? That's sort of a devil's advocate sort of
question ;) and I'm wondering what the shorter list is.
>
> This driver only knows how to handle counters, though. I'm not sure
> whether all of the MSRs that turbostat needs are counters.
I knew that turbostat only did MSR reads and that's why turbostat's code was
changed in this patch. TBH I'm more concerned for software that monitors system
power consumption, performance, and load.
I'll take what Andy has proposed and expand on it.
P.
>
> --Andy
>
next prev parent reply other threads:[~2015-06-28 14:34 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-06-26 17:52 [PATCH] x86, msr: Allow read access to /dev/cpu/X/msr Prarit Bhargava
2015-06-26 18:45 ` H. Peter Anvin
2015-06-26 19:23 ` Brian Gerst
2015-06-26 21:26 ` Prarit Bhargava
2015-06-28 15:13 ` Henrique de Moraes Holschuh
2015-06-27 8:33 ` Ingo Molnar
2015-06-27 8:39 ` Ingo Molnar
2015-06-27 15:52 ` Andy Lutomirski
2015-06-28 14:34 ` Prarit Bhargava [this message]
2015-06-28 15:10 ` Henrique de Moraes Holschuh
2015-06-29 6:42 ` Ingo Molnar
2015-06-29 10:58 ` Matt Fleming
2015-06-29 19:51 ` H. Peter Anvin
2015-06-30 12:20 ` Prarit Bhargava
2015-06-30 12:44 ` Peter Zijlstra
2015-06-30 12:57 ` Ingo Molnar
2015-06-30 13:23 ` Prarit Bhargava
2015-07-01 16:38 ` Brown, Len
2015-07-01 17:33 ` Andy Lutomirski
2015-07-02 9:15 ` Ingo Molnar
2015-07-02 19:22 ` H. Peter Anvin
2015-07-02 19:26 ` Andy Lutomirski
2015-07-03 7:42 ` Ingo Molnar
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