From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40120) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z9wFt-00027x-Ch for qemu-devel@nongnu.org; Tue, 30 Jun 2015 10:11:27 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Z9wFo-0008Tq-CF for qemu-devel@nongnu.org; Tue, 30 Jun 2015 10:11:21 -0400 Received: from mailapp01.imgtec.com ([195.59.15.196]:16798) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z9wFo-0008TQ-5w for qemu-devel@nongnu.org; Tue, 30 Jun 2015 10:11:16 -0400 Message-ID: <5592A36A.1090608@imgtec.com> Date: Tue, 30 Jun 2015 15:10:50 +0100 From: Leon Alrae MIME-Version: 1.0 References: In-Reply-To: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH pic32 2/7] Stop simulation when processor is suspended forever by WAIT instruction with interrupts disabled. List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Serge Vakulenko , qemu-devel@nongnu.org Cc: Aurelien Jarno Hi Serge, On 30/06/2015 06:02, Serge Vakulenko wrote: > Signed-off-by: Serge Vakulenko > --- > target-mips/op_helper.c | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c > index 2a9ddff..1b7caeb 100644 > --- a/target-mips/op_helper.c > +++ b/target-mips/op_helper.c > @@ -22,6 +22,7 @@ > #include "exec/helper-proto.h" > #include "exec/cpu_ldst.h" > #include "sysemu/kvm.h" > +#include "sysemu/sysemu.h" > > #ifndef CONFIG_USER_ONLY > static inline void cpu_mips_tlb_flush (CPUMIPSState *env, int flush_global); > @@ -2235,6 +2236,12 @@ void helper_wait(CPUMIPSState *env) > { > CPUState *cs = CPU(mips_env_get_cpu(env)); > > +#ifndef CONFIG_USER_ONLY > + if (!(env->CP0_Status & (1 << CP0St_IE))) { > + /* WAIT instruction with interrupts disabled - halt the simulation. */ > + qemu_system_shutdown_request(); > + } > +#endif Why do you want to stop the simulation, wouldn't it be beneficial to leave it running? For debugging for example, the user would be still able to inspect the state, that could help to find a clue why CPU got suspended forever. Also, if we take into account implementations (currently not supported in QEMU) where CPU can be woken up by a disabled interrupt (the Config7.WII bit in P5600 for example), then this won't be correct. Thanks, Leon