From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from foss.arm.com ([217.140.101.70]:46564 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751008AbbGARcy (ORCPT ); Wed, 1 Jul 2015 13:32:54 -0400 Message-ID: <55942441.3050705@arm.com> Date: Wed, 01 Jul 2015 18:32:49 +0100 From: James Morse MIME-Version: 1.0 To: Gabriele Paoloni , "Wangzhou (B)" , Bjorn Helgaas , Jingoo Han , Pratyush Anand , Arnd Bergmann , Liviu Dudau , "kishon@ti.com" , "xobs@kosagi.com" , "m-karicheri2@ti.com" , "Minghuan.Lian@freescale.com" CC: "linux-pci@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "devicetree@vger.kernel.org" , Yuanzhichang , Zhudacai , zhangjukuo , qiuzhenfa , "liguozhu@hisilicon.com" Subject: Re: [PATCH v3 2/5] PCI: designware: Add ARM64 support References: <1435743817-19083-1-git-send-email-wangzhou1@hisilicon.com> <1435743817-19083-3-git-send-email-wangzhou1@hisilicon.com> <5593F899.6050306@arm.com> In-Reply-To: Content-Type: text/plain; charset=UTF-8 Sender: linux-pci-owner@vger.kernel.org List-ID: Gabriele Paoloni wrote: >> Both series are applied to v4.1, use the same .config file, and the >> same dtb. >> I will investigate further. >> >> (Re-testing v2 works, so this isn't an interim hardware failure) > > This is a bit weird.... > > Patch 2/5 is the only one that affect platforms different from Hisilicon > > The only difference between V3 patch[2/5] and v2 patch[2/4] is Between v3:2/5 and your replacement for v2:2/4, which arrived after I had tested the v2 series. As the patch has been replaced with a different one - neither 'tested-by' is true any more. It looks like the BAR containing the bridge window is not being assigned, so no devices on bus 1 are discovered. I will send the full v2 and v3 dmesg output separately. Thanks, James From mboxrd@z Thu Jan 1 00:00:00 1970 From: james.morse@arm.com (James Morse) Date: Wed, 01 Jul 2015 18:32:49 +0100 Subject: [PATCH v3 2/5] PCI: designware: Add ARM64 support In-Reply-To: References: <1435743817-19083-1-git-send-email-wangzhou1@hisilicon.com> <1435743817-19083-3-git-send-email-wangzhou1@hisilicon.com> <5593F899.6050306@arm.com> Message-ID: <55942441.3050705@arm.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Gabriele Paoloni wrote: >> Both series are applied to v4.1, use the same .config file, and the >> same dtb. >> I will investigate further. >> >> (Re-testing v2 works, so this isn't an interim hardware failure) > > This is a bit weird.... > > Patch 2/5 is the only one that affect platforms different from Hisilicon > > The only difference between V3 patch[2/5] and v2 patch[2/4] is Between v3:2/5 and your replacement for v2:2/4, which arrived after I had tested the v2 series. As the patch has been replaced with a different one - neither 'tested-by' is true any more. It looks like the BAR containing the bridge window is not being assigned, so no devices on bus 1 are discovered. I will send the full v2 and v3 dmesg output separately. Thanks, James From mboxrd@z Thu Jan 1 00:00:00 1970 From: James Morse Subject: Re: [PATCH v3 2/5] PCI: designware: Add ARM64 support Date: Wed, 01 Jul 2015 18:32:49 +0100 Message-ID: <55942441.3050705@arm.com> References: <1435743817-19083-1-git-send-email-wangzhou1@hisilicon.com> <1435743817-19083-3-git-send-email-wangzhou1@hisilicon.com> <5593F899.6050306@arm.com> Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: Sender: devicetree-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Gabriele Paoloni , "Wangzhou (B)" , Bjorn Helgaas , Jingoo Han , Pratyush Anand , Arnd Bergmann , Liviu Dudau , "kishon-l0cyMroinI0@public.gmane.org" , "xobs-nXMMniAx+RbQT0dZR+AlfA@public.gmane.org" , "m-karicheri2-l0cyMroinI0@public.gmane.org" , "Minghuan.Lian-KZfg59tc24xl57MIdRCFDg@public.gmane.org" Cc: "linux-pci-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" , "linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org" , "devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" , Yuanzhichang , Zhudacai , zhangjukuo , qiuzhenfa , "liguozhu-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org" List-Id: devicetree@vger.kernel.org Gabriele Paoloni wrote: >> Both series are applied to v4.1, use the same .config file, and the >> same dtb. >> I will investigate further. >> >> (Re-testing v2 works, so this isn't an interim hardware failure) > > This is a bit weird.... > > Patch 2/5 is the only one that affect platforms different from Hisilicon > > The only difference between V3 patch[2/5] and v2 patch[2/4] is Between v3:2/5 and your replacement for v2:2/4, which arrived after I had tested the v2 series. As the patch has been replaced with a different one - neither 'tested-by' is true any more. It looks like the BAR containing the bridge window is not being assigned, so no devices on bus 1 are discovered. I will send the full v2 and v3 dmesg output separately. Thanks, James -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html