From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>,
ankitprasad.r.sharma@intel.com, intel-gfx@lists.freedesktop.org,
akash.goel@intel.com, shashidhar.hiremath@intel.com
Subject: Re: [PATCH 1/4] drm/i915: Clearing buffer objects via blitter engine
Date: Thu, 02 Jul 2015 10:30:43 +0100 [thread overview]
Message-ID: <559504C3.1080005@linux.intel.com> (raw)
In-Reply-To: <20150701163007.GJ21398@nuc-i3427.alporthouse.com>
On 07/01/2015 05:30 PM, Chris Wilson wrote:
> On Wed, Jul 01, 2015 at 03:54:55PM +0100, Tvrtko Ursulin wrote:
>>> +static int i915_gem_exec_flush_object(struct drm_i915_gem_object *obj,
>>> + struct intel_engine_cs *ring,
>>> + struct intel_context *ctx,
>>> + struct drm_i915_gem_request **req)
>>> +{
>>> + int ret;
>>> +
>>> + ret = i915_gem_object_sync(obj, ring, req);
>>> + if (ret)
>>> + return ret;
>>> +
>>> + if (obj->base.write_domain & I915_GEM_DOMAIN_CPU) {
>>> + if (i915_gem_clflush_object(obj, false))
>>> + i915_gem_chipset_flush(obj->base.dev);
>>> + obj->base.write_domain &= ~I915_GEM_DOMAIN_CPU;
>>> + }
>>> + if (obj->base.write_domain & I915_GEM_DOMAIN_GTT) {
>>> + wmb();
>>> + obj->base.write_domain &= ~I915_GEM_DOMAIN_GTT;
>>> + }
>>
>> All this could be replaced with i915_gem_object_set_to_gtt_domain, no?
>
> No. Technically this is i915_gem_execbuffer_move_to_gpu().
Aha.. I see now what was my confusion. It doesn't help that
i915_gem_execbuffer_move_to_gpu and execlist_move_to_gpu are implemented
at different places logically.
It would be nice to extract the loop body then call it something like
i915_gem_execbuffer_move_vma_to_gpu, it would avoid at least three
instances of the same code.
>>> +
>>> + return i915.enable_execlists ?
>>> + logical_ring_invalidate_all_caches(*req) :
>>> + intel_ring_invalidate_all_caches(*req);
>>
>> And this is done on actual submission for you by the lower levels so
>> you don't need to call it directly.
>
> What submission? We don't build a batch, we are building a raw request
> to do the operation from the ring.
I was confused to where execlist_move_to_gpu is in the stack.
>>> + lockdep_assert_held(&dev->struct_mutex);
>>
>> It think there was some guidance that lockdep_assert_held is
>> compiled out when lockdep is not in the kernel and that WARN_ON is
>> preferred. In this case that would probably be WARN_ON_ONCE and
>> return error.
>
> Hah, this predates that and I still disagree.
Predates or not is not relevant. :) It is not a clean cut situation I
agree. Maybe we need our own amalgamation on WARN_ON_ONCE and
lockdep_assert_held but I think we either check for these things or not,
or have a really good assurance of test coverage with lockdep enabled
during QA.
>>> + ring = &dev_priv->ring[HAS_BLT(dev) ? BCS : RCS];
>>> + ctx = i915_gem_context_get(file_priv, DEFAULT_CONTEXT_HANDLE);
>>> + /* Allocate a request for this operation nice and early. */
>>> + ret = i915_gem_request_alloc(ring, ctx, &req);
>>> + if (ret)
>>> + return ret;
>>> +
>>> + if (ctx->ppgtt)
>>> + vm = &ctx->ppgtt->base;
>>> + else
>>> + vm = &dev_priv->gtt.base;
>>> +
>>> + if (i915.enable_execlists && !ctx->engine[ring->id].state) {
>>> + ret = intel_lr_context_deferred_create(ctx, ring);
>>
>> i915_gem_context_get above and this call are very similar to what
>> i915_gem_validate_context does. It seems to me it would be better to
>> call the latter function here.
>
> No, the intel_lrc API is absolute garbage and needs to be taken out the
> back and shot. Until that is done, I wouldn't bother continuing to try
> and use the interface at all.
>
> All that needs to happen here is:
>
> req = i915_gem_request_alloc(ring, ring->default_context);
>
> and for the request/lrc to go off and dtrt.
Well.. I the meantime why duplicate it when i915_gem_validate_context
does i915_gem_context_get and deferred create if needed. I don't see the
downside. Snippet from above becomes:
ring = &dev_priv->ring[HAS_BLT(dev) ? BCS : RCS];
ctx = i915_gem_validate_context(dev, file, ring,
DFAULT_CONTEXT_HANDLE);
... handle error...
/* Allocate a request for this operation nice and early. */
ret = i915_gem_request_alloc(ring, ctx, &req);
Why would this code have to know about deferred create.
>>> + }
>>> +
>>> + ringbuf = ctx->engine[ring->id].ringbuf;
>>> +
>>> + ret = i915_gem_object_pin(obj, vm, PAGE_SIZE, 0);
>>> + if (ret)
>>> + return ret;
>>> +
>>> + if (obj->tiling_mode && INTEL_INFO(dev)->gen <= 3) {
>>> + ret = i915_gem_object_put_fence(obj);
>>> + if (ret)
>>> + goto unpin;
>>> + }
>>
>> Why is this needed?
>
> Because it's a requirement of the op being used on those gen. Later gen
> can keep the fence.
>
>> Could it be called unconditionally and still work?
>>
>> At least I would recommend a comment explaining it.
It is ugly to sprinkle platform knowledge to the callers - I think I saw
a callsites which call i915_gem_object_put_fence unconditionally so why
would that not work here?
>>> + if (i915.enable_execlists) {
>>> + if (dev_priv->info.gen >= 8) {
>>> + ret = intel_logical_ring_begin(req, 8);
>>> + if (ret)
>>> + goto unpin;
>>> +
>>> + intel_logical_ring_emit(ringbuf, GEN8_COLOR_BLT_CMD |
>>> + BLT_WRITE_RGBA |
>>> + (7-2));
>>> + intel_logical_ring_emit(ringbuf, BPP_32 |
>>> + ROP_FILL_COPY |
>>> + PAGE_SIZE);
>>> + intel_logical_ring_emit(ringbuf, 0);
>>> + intel_logical_ring_emit(ringbuf,
>>> + obj->base.size >> PAGE_SHIFT
>>> + << 16 | PAGE_SIZE / 4);
>>> + intel_logical_ring_emit(ringbuf,
>>> + i915_gem_obj_offset(obj, vm));
>>> + intel_logical_ring_emit(ringbuf, 0);
>>> + intel_logical_ring_emit(ringbuf, 0);
>>> + intel_logical_ring_emit(ringbuf, MI_NOOP);
>>> +
>>> + intel_logical_ring_advance(ringbuf);
>>> + } else {
>>> + DRM_ERROR("Execlists not supported for gen %d\n",
>>> + dev_priv->info.gen);
>>> + ret = -EINVAL;
>>
>> I would put a WARN_ON_ONCE here, or even just return -EINVAL. If the
>> driver is so messed up in general that execlists are enabled < gen8
>> I think there is no point logging errors about it from here. Would
>> also save you one indentation level.
>
> I would just rewrite this to have a logical interface to the rings. Oh
> wait, I did.
That is out of my jurisdiction, but I think my comment to the above is
not an unreasonable one since it indicates total driver confusion and
could/should be handled somewhere else.
Regards,
Tvrtko
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next prev parent reply other threads:[~2015-07-02 9:30 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-07-01 9:25 [PATCH v4 0/4] Support for creating/using Stolen memory backed objects ankitprasad.r.sharma
2015-07-01 9:25 ` [PATCH 1/4] drm/i915: Clearing buffer objects via blitter engine ankitprasad.r.sharma
2015-07-01 14:54 ` Tvrtko Ursulin
2015-07-01 16:30 ` Chris Wilson
2015-07-02 9:30 ` Tvrtko Ursulin [this message]
2015-07-02 9:50 ` Chris Wilson
2015-07-07 7:42 ` Ankitprasad Sharma
2015-07-07 8:46 ` Chris Wilson
2015-07-07 8:52 ` Ankitprasad Sharma
2015-07-01 9:25 ` [PATCH 2/4] drm/i915: Support for creating Stolen memory backed objects ankitprasad.r.sharma
2015-07-01 15:06 ` Tvrtko Ursulin
2015-07-01 16:19 ` Chris Wilson
2015-07-02 9:37 ` Tvrtko Ursulin
2015-07-02 9:43 ` Chris Wilson
2015-07-01 16:20 ` Tvrtko Ursulin
2015-07-01 9:25 ` [PATCH 3/4] drm/i915: Add support for stealing purgable stolen pages ankitprasad.r.sharma
2015-07-01 16:17 ` Tvrtko Ursulin
2015-07-01 9:25 ` [PATCH 4/4] drm/i915: Support for pread/pwrite from/to non shmem backed objects ankitprasad.r.sharma
2015-07-01 9:54 ` Chris Wilson
2015-07-02 10:42 ` Tvrtko Ursulin
2015-07-02 11:00 ` Chris Wilson
2015-07-02 11:27 ` Tvrtko Ursulin
2015-07-02 11:58 ` Chris Wilson
2015-07-03 5:07 ` shuang.he
-- strict thread matches above, loose matches on Subject: below --
2015-05-06 10:15 [PATCH v3 0/4] Support for creating/using Stolen memory " ankitprasad.r.sharma
2015-05-06 10:16 ` [PATCH 1/4] drm/i915: Clearing buffer objects via blitter engine ankitprasad.r.sharma
2014-06-20 10:02 [PATCH 0/4] Introduce a new create ioctl for user specified sourab.gupta
2014-06-20 10:02 ` [PATCH 1/4] drm/i915: Clearing buffer objects via blitter engine sourab.gupta
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