From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:45177) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZCpdF-0000fI-Ny for qemu-devel@nongnu.org; Wed, 08 Jul 2015 09:43:26 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZCpdA-0000YL-MD for qemu-devel@nongnu.org; Wed, 08 Jul 2015 09:43:25 -0400 Received: from mailapp01.imgtec.com ([195.59.15.196]:54122) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZCpdA-0000Xy-FM for qemu-devel@nongnu.org; Wed, 08 Jul 2015 09:43:20 -0400 Message-ID: <559D28F3.2060308@imgtec.com> Date: Wed, 8 Jul 2015 14:43:15 +0100 From: Leon Alrae MIME-Version: 1.0 References: <1435678395-14576-1-git-send-email-yongbok.kim@imgtec.com> In-Reply-To: <1435678395-14576-1-git-send-email-yongbok.kim@imgtec.com> Content-Type: text/plain; charset="ISO-8859-1" Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH] disas/mips: fix disassembling R6 instructions List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Yongbok Kim , qemu-devel@nongnu.org Cc: aurelien@aurel32.net On 30/06/2015 16:33, Yongbok Kim wrote: > In the Release 6 of the MIPS Architecture, LL, SC, LLD, SCD, PREF > and CACHE instructions have 9 bits offsets. > > Signed-off-by: Yongbok Kim > --- > disas/mips.c | 12 ++++++------ > 1 files changed, 6 insertions(+), 6 deletions(-) Applied this and the other fix "target-mips: fix to clear MSACSR.Cause" to mips-next, thanks. Leon