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From: Stefano Babic <sbabic@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH] mmc:fsl_esdhc invalidate dcache before read
Date: Fri, 10 Jul 2015 09:56:23 +0200	[thread overview]
Message-ID: <559F7AA7.4030003@denx.de> (raw)
In-Reply-To: <1435199546-12292-1-git-send-email-Peng.Fan@freescale.com>

Hi Peng,


I see this patch is now delegated to me. Then, I have no objections to
merge it into u-boot-imx if Pantelis agree.


On 25/06/2015 04:32, Peng Fan wrote:
> DCIMVAC is upgraded to DCCIMVAC for the individual processor
> (Cortex-A7) that the DCIMVAC is executed on.
> 
Can you better explain it ? What are the consequences of using DCCIMVAC
into this driver ?

This driver is not only for i.MX. It runs on PowerPc, too. Do you tested
this patch on PowerPC architecture, too ? Maybe someone else can do it ?

> We should follow the linux dma follow. Before DMA read, first
> invalidate dcache then after DMA read, invalidate dcache again.
> 
> With the DMA direction DMA_FROM_DEVICE, the dcache need be
> invalidated again after the DMA completion. The reason is
> that we need explicity make sure the dcache been invalidated
> thus to get the DMA'ed memory correctly from the physical memory.
> Any cache-line fill during the DMA operations such as the
> pre-fetching can cause the DMA coherency issue, thus CPU get the stale data.
> 
> Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
> Signed-off-by: Ye.Li <B37916@freescale.com>
> Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
> Signed-off-by: Jason Liu <r64343@freescale.com>
> ---
>  drivers/mmc/fsl_esdhc.c | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
> index c4719e6..0510bf0 100644
> --- a/drivers/mmc/fsl_esdhc.c
> +++ b/drivers/mmc/fsl_esdhc.c
> @@ -341,6 +341,9 @@ esdhc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
>  		err = esdhc_setup_data(mmc, data);
>  		if(err)
>  			return err;
> +
> +		if (data->flags & MMC_DATA_READ)
> +			check_and_invalidate_dcache_range(cmd, data);
>  	}
>  
>  	/* Figure out the transfer arguments */
> @@ -437,6 +440,11 @@ esdhc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
>  			}
>  		} while ((irqstat & DATA_COMPLETE) != DATA_COMPLETE);
>  
> +		/*
> +		 * Need invalidate the dcache here again to avoid any
> +		 * cache-fill during the DMA operations such as the
> +		 * speculative pre-fetching etc.
> +		 */
>  		if (data->flags & MMC_DATA_READ)
>  			check_and_invalidate_dcache_range(cmd, data);
>  #endif
> 

From my side it is ok.

Reviewed-by: Stefano Babic <sbabic@denx.de>

Best regards,
Stefano Babic



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  parent reply	other threads:[~2015-07-10  7:56 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-06-25  2:32 [U-Boot] [PATCH] mmc:fsl_esdhc invalidate dcache before read Peng Fan
2015-07-10  0:21 ` Peng Fan
2015-07-10  7:56 ` Stefano Babic [this message]
2015-07-11  2:43   ` Peng Fan
2015-07-26 10:20     ` Stefano Babic
2015-07-27 16:36       ` York Sun
2015-07-27 18:15         ` York Sun
2015-07-27 18:55           ` Stefano Babic

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